Determination and correction of physical circuit event related errors of a hardware design

A method, comprising:

• executing, by a system operatively coupled to a processor, an emulated hardware design while injecting a biased fault injection that mimics a physical circuit event error into a path of the emulated hardware design to produce a first execution result,
• executing, by the system, the emulated hardware design without injecting the biased fault injection into the path of the emulated hardware design to produce a second execution result,
• determining, by the system, whether the emulated hardware design is vulnerable to the physical circuit event error based on a comparison of the first execution result with the second execution result;
• and
• in response to determining that the emulated hardware design is vulnerable to the physical circuit event error, selectively adjusting, by the system, a timing of the path.

A computer program product that facilitates correction of physical circuit event related errors of a hardware design, the computer program product comprising a computer readable storage medium having program instructions embodied therewith, the program instructions are executable by a processor to cause the processor to:

• execute an emulated hardware design while injecting a biased fault injection that mimics a physical circuit event error into a path of the emulated hardware design to produce a first execution result,
• execute the emulated hardware design without injecting the biased fault injection into the path of the emulated hardware design to produce a second execution result,
• determine whether the emulated hardware design is vulnerable to the physical circuit event error based on a comparison of the first execution result with the second execution result;
• and
• in response to a determination that the emulated hardware design is vulnerable to the physical circuit event error, change a timing constraint of the emulated hardware design, wherein the change to the timing constraint is selected to increase a resiliency of the emulated hardware design.