US 11,626,846 B2Granted

Differential amplifier circuitry

AssigneeSocionext Inc.

InventorsArmin Jalili Sebardan, Alistair John Gratrex

Life of this patent

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Abstract

Differential amplifier circuitry including: first and second main transistors of a given conductivity type; and first and second auxiliary transistors of an opposite conductivity type, where the first and second main transistors are connected along first and second main current paths passing between first and second main voltage reference nodes and first and second output nodes, respectively, with their source terminals connected to the first and second output nodes, respectively, and with their gate terminals controlled by component input signals of a differential input signal; and the first and second auxiliary transistors are connected along first and second auxiliary current paths passing between first and second auxiliary voltage reference nodes and the first and second output nodes, respectively, with their drain terminals connected to the first and second output nodes, respectively, and with their gate terminals controlled by the component input signals of the differential input signal.

Claims16

Dependent claims

A differential amplifier circuit comprising:

a first voltage supply node to which a first voltage is configured to be supplied;
a second voltage supply node to which a second voltage is configured to be supplied:
a third voltage supply node to which a third voltage is configured to be supplied, the third voltage being different from the first and second voltages, respectively,
a first input node at which a first input signal is configured to be received, the first input signal being one component of a differential input signal;
a second input node at which a second input signal is configured to be received, the second input signal being the other component of the differential input signal;
a first output node at which a first output signal is configured to be generated, the first output signal being one component of a differential output signal;
a second output node at which a second output signal is configured to be generated, the second output signal being the other component of the differential output signal;
a first main transistor of a first conductivity type, the first main transistor being electrically connected between the first voltage supply node and the first output node and being controlled by the first input signal received at the first input node, the first output node being electrically connected to the third voltage supply node via a first connecting circuit;
a second main transistor of the first conductivity type, the second main transistor being electrically connected between the first voltage supply node and the second output node and being controlled by second input signal received at the second input node, the second output node being electrically connected to the third voltage supply node via a second connecting circuit;
a first auxiliary transistor of a second conductivity type which is opposite to the first conductivity type, the first auxiliary transistor being electrically connected between the second voltage supply node and the first output node and being controlled by the second input signal received at the second input node;
and
a second auxiliary transistor of the second conductivity type, the second auxiliary transistor being electrically connected between the second voltage supply node and the second output node and being controlled by the first input signal received at the first input node.

9 more elements

An integrated circuit comprising:

an internal circuit configured to perform a process;
and a differential amplifier circuit including:
a first voltage supply node to which a first voltage is configured to be supplied;
a second voltage supply node to which a second voltage is configured to be supplied:
a third voltage supply node to which a third voltage is configured to be supplied, the third voltage being different from the first and second voltages, respectively,
a first input node at which a first input signal is configured to be received, the first input signal being one component of a differential input signal;
a second input node at which a second input signal is configured to be received, the second input signal being the other component of the differential input signal;
a first output node at which a first output signal is configured to be generated, the first output signal being one component of a differential output signal;
a second output node at which a second output signal is configured to be generated, the second output signal being the other component of the differential output signal;
a first main transistor of a first conductivity type, the first main transistor being electrically connected between the first voltage supply node and the first output node and being controlled by the first input signal received at the first input node, the first output node being electrically connected to the third voltage supply node via a first connecting circuit;
a second main transistor of the first conductivity type, the second main transistor being electrically connected between the first voltage supply node and the second output node and being controlled by second input signal received at the second input node, the second output node being electrically connected to the third voltage supply node via a second connecting circuit;
a first auxiliary transistor of a second conductivity type which is opposite to the first conductivity type, the first auxiliary transistor being electrically connected between the second voltage supply node and the first output node and being controlled by the second input signal received at the second input node;
and
a second auxiliary transistor of the second conductivity type, the second auxiliary transistor being electrically connected between the second voltage supply node and the second output node and being controlled by the first input signal received at the first input node,
wherein the differential amplifier circuit is configured to receive an output signal of the internal circuit as the differential input signal.

12 more elements

Dependencies are inferred from the claim text.

Facts

Application: 17/716,725Filed 8 Apr 2022 · division
Priority: EP 191783975 Jun 2019
Published: US 2022/0239265 A128 Jul 2022
Granted: 11 Apr 2023
Term ends: Not estimatedThe source records don’t support an estimate.

Classification21 codes

H03F 3/45179
Characterised by the way of implementation of the active amplifying circuit in the differential amplifier: using MOSFET transistors as the active…
H03F 3/45264
Using MOSFET transistors as the active amplifying circuit: complementary cross coupled types
H03F 1/3205
Modifications of amplifiers to reduce non-linear distortion: in field-effect transistor amplifiers
H03F 1/3211
Modifications of amplifiers to reduce non-linear distortion: in differential amplifiers

Family

Application16/894,590Parent of this division · filed 5 Jun 2020
US 2022/0239265 A1Pre-grant publication · published 28 Jul 2022
US 11,336,245 B2Parent of this division
US 2020/0389137 A1Published application
US 11,626,846 B2This patent

From the US filing history. Foreign family members aren’t listed.