Semiconductor test apparatus and semiconductor test method

A semiconductor test apparatus comprising:

• a stage on which a wafer including a plurality of subjects is to be mounted;
• a probe card disposed above the stage;
• a pressurizing wall disposed on a surface of the probe card opposing the stage, extending toward the stage, and having an opening;
• a mark disposed on a lower surface of the pressurizing wall, the lower surface being a surface of the pressurizing wall opposing the stage;
• a probe disposed in the opening;
• a tube to force air into the opening;
• a detector to detect first spacing between a tip of the probe and the mark;
• and
• a controller to control second spacing between the wafer and the lower surface of the pressurizing wall based on the first spacing detected by the detector, wherein
• when an electrical property of each of the subjects of the wafer is measured, the second spacing is controlled to be predetermined spacing by the controller, and the air is forced into the opening through the tube.