Backside via with a low-k spacer

A method, comprising:

• receiving a workpiece including:
• a first active region and a second active region over a substrate,
• a source feature disposed between the first active region and the second active region along a direction, and
• a sacrificial plug disposed in the substrate and under the source feature;
• flipping over the workpiece;
• forming a hard mask directly over the sacrificial plug and a first portion of the substrate laterally adjacent to the sacrificial plug;
• replacing a second portion of the substrate not covered by the hard mask with a backside dielectric layer;
• removing the hard mask to expose the sacrificial plug and the first portion of the substrate;
• replacing the sacrificial plug with a backside contact;
• and
• selectively removing the first portion of the substrate to form a gap between the backside dielectric layer and the backside contact.

A semiconductor device, comprising:

• a plurality of nanostructures;
• a source feature coupled to each of the plurality of nanostructures;
• a backside source contact disposed over the source feature;
• a liner disposed along sidewall of the backside source contact;
• a gate structure wrapping around each of the plurality of nanostructures;
• and,
• a backside dielectric layer disposed over the gate structure,
• wherein the backside source contact is spaced apart from the backside dielectric layer by the liner and an air gap.