Load regulation for LDO with low loop gain
AssigneepSemi Corporation
InventorSatish Vangara
Life of this patent
Estimating the term…
Loading patent…
AssigneepSemi Corporation
InventorSatish Vangara
Estimating the term…
Circuits and methods for maintaining loop stability and good load regulation in low loop gain LDO regulator circuits. Embodiments encompass LDO regulator circuits that include an offset error correction circuit that generates an opposing voltage VOFFSET as a function of load current to substantially cancel out variations in VOUT that would otherwise occur due to load regulation limitations of the LDO regulator circuits. Embodiments use VOFFSET to imbalance currents in differential paths in a last-stage LDO error-amplifier so that an offset is propagated to a pair of inputs to the error-amplifier, thereby altering the output voltage VOUT to a corrected value. Benefits include improved LDO load regulation even when feedback loop gain is low, the available of both digital and analog implementations, high LDO accuracy and less variation of the output voltage VOUT, and suitability for implementation in integrated circuits for applications such as high precision power supplies.
An offset error correction circuit configured to be coupled to a low-dropout (LDO) regulator circuit that includes a feedback loop, an input configured to receive an unregulated voltage from a voltage source, and an output for a regulated voltage VOUT, the offset error correction circuit configured to generate an offset correction signal as a function of a load current ILOAD through the coupled LDO regulator circuit, the offset correction signal being provided to the coupled LDO regulator circuit so as to adjust the open-loop gain of the coupled LDO regulator circuit to substantially offset variations in the regulated voltage VOUT.
A low-dropout (LDO) regulator circuit including an input configured to receive an unregulated voltage from a voltage source, an output for a regulated voltage VOUT, and an offset error correction circuit that generates an offset current IOFFSET as a function of a load current ILOAD through the LDO regulator circuit, wherein the offset current IOFFSET is provided to the LDO regulator circuit which produces a correction signal VOFFSET that substantially offsets variations in the regulated voltage VOUT due to closed-loop operation of the LDO regulator circuit.
A low-dropout (LDO) regulator circuit including:
Dependencies are inferred from the claim text.