Fault detection within an analog-to-digital converter

An integrated circuit (IC), comprising:

• an analog-to-digital converter (ADC) having selectable first and second analog channel inputs and a digital output;
• a window comparator coupled to the digital output, the window comparator configured to compare a digital value on the digital output to first and second threshold values defining a window and to assert a trigger signal responsive to the digital value being outside the window;
• a programmable clock circuit configured to provide a clock signal to the ADC;
• and
• a controller that, response to assertion of the trigger signal, is configured to generate a sample rate control signal to the clock circuit to cause the clock circuit to increase the frequency of the clock signal and toggle selection between the first and second analog channel inputs;
• and
• a result comparison circuit having a comparison input coupled to the digital output, the result comparison circuit configured to compare a first digital conversion output from the ADC to a second digital conversion output from the ADC.

A method, comprising:

• operating an analog-to-digital converter (ADC) with a clock having a first frequency;
• responsive to a first control signal, increasing the frequency of the clock to a second frequency;
• and
• comparing a successive pair of ADC digital outputs;
• and
• asserting a fault signal responsive to a difference between the successive pair of ADC digital outputs being greater than a threshold.