Dual voltage switched branch LNA architecture

A multi-branch cascode amplifier comprising:

• a plurality of stacked cascode amplifier branches, each branch comprising a plurality of transistors coupled between a common output node of the multi-branch cascode amplifier and a reference ground, at least one branch of the plurality of stacked cascode amplifier branches configured to operate according to an ON state for amplification of an input RF signal to the at least one branch, and an OFF state for no amplification of the input RF signal,
• a protection circuit coupled to the at least one branch, the protection circuit comprising:
• a first switching arrangement in series connection with the plurality of transistors of the at least one branch;
• and
• a second switching arrangement coupled to the at least one branch,
• wherein:
• during the OFF state of the at least one branch and an ON state of one or more other branches of the plurality of stacked cascode amplifier branches,
• the first switching arrangement is configured to decouple a low-side segment of the at least one branch from the common output node thereby providing a high-side segment of the at least one branch that is coupled to the common output node, wherein the plurality of transistors of the at least one branch are included in a combination of the low-side and the high-side segments of said branch, and
• the second switching arrangement is configured to selectively couple a low-side reference voltage to the low-side segment and a high-side reference voltage to the high-side segment to maintain operation of the plurality of transistors of the at least one branch within their respective maximum tolerable voltages.