Body tie optimization for stacked transistor amplifier

A stacked metal-oxide-semiconductor (MOS) power amplifier, comprising:

• a transistor stack comprising a plurality of stacked transistors comprising an input transistor for receiving an input RF signal, and an output transistor for outputting an output RF signal that is an amplified version of the input RF signal;
• at least one gate capacitor connected between a gate of a transistor of the plurality of stacked transistors different from the input transistor, and a reference ground,
• wherein at least one transistor of the plurality of stacked transistors is a four-terminal transistor having a body that is coupled to a source of said transistor,
• wherein the plurality of stacked transistors comprises at least one three-terminal transistor, wherein the at least one three-terminal transistor comprises a body that is not coupled to a potential, and
• wherein the body of the at least one transistor is directly connected to the source of said transistor.

A method for manufacturing a stacked metal-oxide-semiconductor (MOS) power amplifier, the method comprising:

• providing a substrate comprising one of:
• a) silicon-on-insulator substrate, and b) a silicon-on-sapphire substrate;
• and
• manufacturing, on the substrate, a transistor stack, the transistor stack comprising:
• a plurality of series connected transistors comprising an input transistor and an output transistor,
• wherein the input transistor comprises a four-terminal transistor having a body directly connected to a source of the four-terminal transistor,
• wherein the plurality of series connected transistors comprises at least one three-terminal transistor, and wherein the at least one three-terminal transistor comprises a body that is not coupled to a potential.