Multi-chip integrated circuit and interactive communication method for the same
AssigneeSilergy Semiconductor Technology (Hangzhou) LTD
InventorsChuanxin Wu, Qinfen Hu
Life of this patent
Estimating the term…
Abstract
A multi-chip integrated circuit and an interactive communication method for the multi-chip integrated circuit are provided. The multi-chip integrated circuit includes multiple low-voltage chips connected in series with each other instead of an ultra-high voltage chip, to reduce requirements on technology for the chip. In addition, the multiple chips communicate with each other through internal communication ports based on a differential signal, to enhance reliability of communication. Two adjacent chips are connected in series and a low-voltage power supply is arranged, so that a voltage difference between communication ports of the two adjacent chips is small.
Claims19
A multi-chip integrated circuit, comprising at least two chips connected in series, wherein each of the at least two chips is configured to communicate with at least one adjacent chip through at least a first and a second groups of communication ports, and wherein each of the at least two chips comprises:
- a transmitting circuit corresponding to the first group of communication ports;
- a receiving circuit corresponding to the second group of communication ports;
- and
- a low-voltage power supply configured to boost or lower a voltage by a threshold to supply power to the transmitting circuit and the receiving circuit, to reduce a voltage difference between corresponding communication ports of the two adjacent chips.
An interactive communication method for a multi-chip integrated circuit, comprising:
- performing communication, between a first chip and a second chip through at least a first and a second groups of communication ports, wherein
- the first chip is connected in series with the second chip, and is adjacent to the second chip;
- each of the first chip and the second chip comprises:
- a transmitting circuit corresponding to the first group of communication ports;
- a receiving circuit corresponding to the second group of communication ports;
- and
- a low-voltage power supply for boosting or lowering a voltage by a threshold to supply power to the transmitting circuit and the receiving circuit, to reduce a voltage difference between corresponding communication ports of the two chips.
A chip for a multi-chip integrated circuit, comprising:
- a first communication module configured to communicate with a chip arranged upstream of the chip;
- a second communication module configured to communicate with a chip arranged downstream of the chip, wherein each of the first communication module and the second communication module comprises:
- a transmitting circuit;
- a receiving circuit;
- and
- a low-voltage power supply configured to boost or lower a voltage by a threshold to supply power to the transmitting circuit and the receiving circuit;
- and
- a first group of communication ports corresponding to the transmitting circuit in the first communication module, a second group of communication ports corresponding to the receiving circuit in the first communication module, a third group of communication ports corresponding to the transmitting circuit in the second communication module, and a fourth group of communication ports corresponding to the receiving circuit in the second communication module.
Dependencies are inferred from the claim text.