Digital-to-analog converter system
AssigneeTexas Instruments Incorporated
InventorJun Zhang
Life of this patent
Estimating the term…
Abstract
A digital-to-analog converter for generating an analog output voltage in response to a digital value comprising a plurality of bits, the converter including: (i) a first switched resistor network having a first configuration and for converting a first input differential signal into a first analog output in response to a first set of bits in the plurality of bits; and (ii) a second switched resistor network, coupled to the first switched resistor network, having a second configuration, differing from the first configuration, and for converting a second input differential signal into a second analog output in response to a second set of bits in the plurality of bits.
Claims20
A circuit comprising:
- a first voltage input;
- a second voltage input;
- a set of resistors coupled in series between the first voltage input and the second voltage input;
- a voltage output;
- a first decoder that includes a set of row outputs;
- a second decoder that includes a set of column outputs;
- a set of transistors, wherein:
- each transistor of the set of transistors includes a gate coupled to a first row output of the set of row outputs of the first decoder;
- and
- the set of transistors includes a first transistor coupled between a first resistor of the set of resistors and a first column node;
- and
- a column transistor coupled between the first column node and the voltage output, wherein the column transistor includes a gate coupled to a first column output of the set of column outputs of the second decoder.
A circuit device comprising:
- a first set of inputs configured to receive a reference voltage;
- a second set of inputs configured to receive a digital value;
- an output configured to provide an analog voltage in response to the reference voltage and the digital value;
- and
- a set of stages coupled in series between the first set of inputs and the output, wherein the set of stages includes a first stage that includes:
- a first voltage input;
- a second voltage input;
- a set of resistors coupled in series between the first voltage input and the second voltage input;
- a voltage output;
- a set of row transistors, wherein:
- each transistor of the set of row transistors includes a gate coupled to a first row node;
- each transistor of the set of row transistors is coupled between the set of resistors and a respective column node;
- and
- a set of column transistors each coupled between a respective column node and the voltage output.
Dependencies are inferred from the claim text.