Differential cascode amplifier arrangement with reduced common mode gate RF voltage
AssigneepSemi Corporation
InventorDan William Nobbe
Life of this patent
Estimating the term…
Abstract
Methods and devices for reducing gate node instability of a differential cascode amplifier are presented. Ground return loops, and therefore corresponding parasitic inductances, are eliminated by using voltage symmetry at nodes of two cascode amplification legs of the differential cascode amplifier. Series connected capacitors are coupled between gate nodes of pairs of cascode amplifiers of the two cascode amplification legs so to create a common node connecting the two capacitors. In order to reduce peak to peak voltage variation at the common node under large signal conditions, a shunting capacitor is connected to the common node.
Claims21
A differential radio frequency (RF) cascode amplification circuit comprising:
- a first cascode amplification leg comprising a first input transistor and a first group of cascode transistors including a first output transistor, wherein the first cascode amplification leg is configured to amplify a first input RF signal of a differential RF input signal;
- a second cascode amplification leg comprising a second input transistor and a second group of cascode transistors including a second output transistor, wherein the second cascode amplification leg is configured to amplify a second input RF signal of the differential RF input signal;
- and
- at least one capacitive coupling arrangement coupled between a first gate node of a first cascode transistor of the first group of cascode transistors and a second gate node of a second cascode transistor of the second group of cascode transistors,
- wherein:
- the at least one capacitive coupling arrangement comprises a shunting capacitor;
- the shunting capacitor comprises two parallel capacitors of a same value,
- each of the two parallel capacitors comprises a top conductive plate and a bottom conductive plate,
- the top conductive plate of a first capacitor of the two parallel capacitors is connected to the bottom conductive plate of a second capacitor of the two parallel capacitors, and
- the bottom conductive plate of the first capacitor of the two parallel capacitors is connected to the top conductive plate of the second capacitor of the two parallel capacitors.
A differential radio frequency (RF) cascode amplification circuit comprising:
- a first cascode amplification leg comprising a first input transistor and a first group of cascode transistors including a first output transistor, wherein the first cascode amplification leg is configured to amplify a first input RF signal of a differential RF input signal;
- a second cascode amplification leg comprising a second input transistor and a second group of cascode transistors including a second output transistor, wherein the second cascode amplification leg is configured to amplify a second input RF signal of the differential RF input signal;
- and
- at least one capacitive coupling arrangement coupled between a first gate node of a first cascode transistor of the first group of cascode transistors and a second gate node of a second cascode transistor of the second group of cascode transistors,
- wherein the at least one capacitive coupling arrangement comprises a shunting capacitor, and
- wherein the at least one capacitive coupling arrangement further comprises a first capacitor connected between the first gate node and the shunting capacitor, and a second capacitor connected between the second gate node and the shunting capacitor.
A differential radio frequency (RF) cascode amplification circuit comprising:
- a first cascode amplification leg comprising a first input transistor and a first group of cascode transistors including a first output transistor, wherein the first cascode amplification leg is configured to amplify a first input RF signal of a differential RF input signal;
- a second cascode amplification leg comprising a second input transistor and a second group of cascode transistors including a second output transistor, wherein the second cascode amplification leg is configured to amplify a second input RF signal of the differential RF input signal;
- and
- at least one capacitive coupling arrangement coupled between a first gate node of a first cascode transistor of the first group of cascode transistors and a second gate node of a second cascode transistor of the second group of cascode transistors,
- wherein the at least one capacitive coupling arrangement comprises a shunting capacitor and;
- wherein the at least one capacitive coupling arrangement comprises a plurality of capacitive coupling arrangements each connected between symmetrical node pairs formed by gate nodes of the first and second groups of cascode transistors.
A method for reducing gate node parasitic inductance in a differential radio frequency (RF) cascode amplification circuit, the method comprising:
- providing a differential RF cascode amplification circuit comprising symmetrical node pairs of first and second cascode amplification legs;
- coupling a capacitive coupling arrangement between a first gate node of a cascode transistor of the first cascode amplification leg and a second gate node of a cascode transistor of the second cascode amplification leg, the capacitive coupling arrangement comprising a shunting capacitor;
- based on the coupling, creating an AC reference voltage at an intermediate gate node provided by the shunting capacitor;
- based on the coupling and the creating, capacitively coupling via respective first and second capacitors the first and second gate nodes to the intermediate gate node, thereby eliminating a physical ground connection to the first and second capacitors;
- and
- based on the eliminating, reducing parasitic inductance at the first and second gate nodes.
Dependencies are inferred from the claim text.