Spectral shaping of spread spectrum clocks/frequencies through post processing
AssigneeTexas Instruments Incorporated
InventorJoerg Erik Goller
Life of this patent
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Abstract
An integrated circuit. The integrated circuit comprises a timebase generator and a switch mode direct current-to-direct current (DC-to-DC) converter coupled to the timebase generator. The timebase generator comprises a linear feedback shift register (LFSR) having an output and a logic circuit comprising a first logic inverter, a first AND logic gate, and a first multiplexer, wherein the first logic inverter has an input coupled to a most significant bit of the output of the LFSR, wherein the first AND logic gate has a first input coupled to a second most significant bit of the output of the LFSR and a second input coupled to an output of the first logic inverter, wherein a selector input of the first multiplexer is coupled to an output of the first AND logic gate.
Claims15
A circuit, comprising:
- a timebase generator including:
- a linear feedback shift register (LFSR) having an LFSR output;
- and
- a logic circuit having an inverter, an AND gate, and a multiplexer, wherein the inverter has an input coupled to a most significant bit (MSB) of the LFSR output, the AND gate has a first input coupled to a second MSB of the LFSR output and a second input coupled to an output of the inverter, a selector input of the multiplexer is coupled to an output of the AND gate, a first input of the multiplexer is coupled to the second MSB of the LFSR output, and a second input of the multiplexer is coupled to a source providing a logic low;
- and
- a switch mode direct current-to-direct current (DC-to-DC) converter coupled to the timebase generator.
A circuit, comprising:
- a timebase generator comprising:
- a linear feedback shift register (LFSR) configured to produce a first control word at a LFSR output;
- a logic circuit having a logic input coupled to the LFSR output, the logic circuit configured to:
- produce a second control word at a logic output, the second control word being either:
- (1) the first control word with no changes;
- or (2) the first control word with one or more bits inverted;
- decrease a value of a most significant bit (MSB);
- and
- increase a value of a second MSB;
- and
- a signal generator having an input coupled to the logic output, the signal generator configured to produce a timebase signal responsive to the second control word.
A method comprising:
- producing, by a linear feedback shift register (LFSR), a first control word;
- producing, by a logic circuit, a second control word responsive to the first control word, wherein the second control word is either:
- (1) the first control word with no changes;
- or (2) the first control word with one or more bits inverted, the logic circuit configured to:
- decrease a value of a most significant bit (MSB);
- and
- increase a value of a second MSB;
- and
- producing, by a signal generator, a timebase signal responsive to the second control word.
Dependencies are inferred from the claim text.