Transistor device and method of fabricating a gate of a transistor device
AssigneeInfineon Technologies Austria AG
InventorsIngmar Neumann, Michael Hutzler, David Laforet, Roland Moennich, Ralf Siemieniec
Life of this patent
Estimating the term…
Abstract
In an embodiment, a transistor device includes a semiconductor substrate having a main surface, a cell field including a plurality of transistor cells, and an edge termination region laterally surrounding the cell field. The cell field includes a gate trench in the main surface of the semiconductor substrate, a gate dielectric lining the gate trench, a metal gate electrode arranged in the gate trench on the gate dielectric, and an electrically insulating cap arranged on the metal gate electrode and within the gate trench.
Claims20
A transistor device, comprising:
- a semiconductor substrate having a main surface, a cell field comprising a plurality of transistor cells of a vertical power transistor, a drain region of a first conductivity type at a second main surface which opposes the main surface, and an edge termination region laterally surrounding the cell field;
- wherein the cell field comprises:
- a body region of a second conductivity type which opposes the first conductivity type on a drift region of the first conductivity type;
- a source region of the first conductivity type on or in the body region;
- a gate trench in the main surface of the semiconductor substrate;
- a gate dielectric lining the gate trench;
- a metal gate electrode arranged in the gate trench on the gate dielectric;
- and
- an electrically insulating cap arranged on the metal gate electrode and within the gate trench.
A method of fabricating a gate of a transistor device comprising a semiconductor substrate having a main surface, a cell field comprising a plurality of transistor cells of a vertical power transistor, a drain region of a first conductivity type at a second main surface which opposes the main surface, and an edge termination region laterally surrounding the cell field, the method comprising:
- forming a body region of a second conductivity type which opposes the first conductivity type on a drift region of the first conductivity type in the cell field;
- forming a source region of the first conductivity type on or in the body region in the cell field;
- forming a gate trench in the main surface of the semiconductor substrate in the cell field;
- lining the gate trench with a gate dielectric;
- forming a metal gate electrode on the gate dielectric;
- and
- forming an electrically insulating cap on the metal gate electrode and within the gate trench.
A method of fabricating a gate of a transistor device comprising a semiconductor substrate having a main surface, a cell field comprising a plurality of transistor cells, and an edge termination region laterally surrounding the cell field, the method comprising:
- forming a gate trench in the main surface of the semiconductor substrate in the cell field;
- lining the gate trench with a gate dielectric;
- forming a metal gate electrode on the gate dielectric;
- forming an electrically insulating cap on the metal gate electrode and within the gate trench;
- and
- after forming the electrically insulating cap, implanting a body region and a source region into the main surface of the semiconductor substrate.
Dependencies are inferred from the claim text.