Semiconductor device structure integrating air gaps and methods of forming the same

A semiconductor device structure, comprising:

• a substrate;
• a fin extending along a first direction on the substrate;
• a gate stack extending across the fin along a second direction substantially perpendicular to the first direction;
• a first source/drain epitaxy feature and a second source/drain epitaxy feature disposed in opposing regions of the fin with respect to the gate stack;
• a conductive feature disposed below the first source/drain epitaxy feature;
• a power rail disposed below and in contact with the conductive feature;
• and
• a liner enclosing sidewalls of the conductive feature, wherein an air gap is formed in the liner, and the liner comprises:
• a first liner layer disposed below the second source/drain epitaxy feature and in contact with the sidewalls of the conductive feature;
• and
• a second liner layer in contact with the first liner.

A semiconductor device structure, comprising:

• a first epitaxy feature in contact with a conductive feature;
• a second epitaxy feature disposed adjacent to the first epitaxy feature;
• a silicon portion disposed between the first epitaxy feature and the second epitaxy feature;
• an oxide layer disposed over the second epitaxy feature and the silicon portion and around a sidewall of the conductive feature;
• and
• a first liner layer disposed between the oxide layer and the second epitaxy feature, wherein a portion of the second epitaxy feature, the silicon portion, a portion of the oxide layer, and the sidewall of the conductive feature are exposed to an air gap.