Semiconductor devices
AssigneeSamsung Electronics Co., Ltd.
InventorsNamkyu Edward Cho, Seung Soo Hong, Geum Jung Seong, Seung Hun Lee, Jeong Yun Lee
Life of this patent
Estimating the term…
Abstract
A semiconductor device includes fin patterns on a substrate, at least one gate electrode intersecting the fin patterns, source/drain regions on upper surfaces of the fin patterns, and at least one blocking layer on a sidewall of a first fin pattern of the fin patterns, the at least one blocking layer extending above an upper surface of the first fin pattern of the fin patterns, wherein a first source/drain region of the source/drain regions that is on the upper surface of the first fin pattern has an asymmetric shape and is in direct contact with the at least one blocking layer.
Claims20
A semiconductor device, comprising:
- a substrate;
- a first fin on the substrate;
- a second fin on the substrate;
- a third fin on the substrate;
- a fourth fin on the substrate;
- a first isolation on the substrate, the first isolation being between the first fin and the second fin;
- a second isolation on the substrate, the second isolation being between the second fin and the third fin;
- a third isolation on the substrate, the third isolation being between the third fin and the fourth fin;
- a gate on the first fin, the second fin, the third fin, the fourth fin, the first isolation, the second isolation, and the third isolation;
- a first epitaxial source/drain on the first fin;
- a second epitaxial source/drain on the second fin;
- a third epitaxial source/drain on the third fin;
- a fourth epitaxial source/drain on the fourth fin;
- a first blocking pattern on the first isolation, the first blocking pattern contacting and extending along a side surface of each of the second fin and the second epitaxial source/drain;
- and
- a second blocking pattern on the third isolation, the second blocking pattern contacting and extending along a side surface of each of the third fin and the third epitaxial source/drain,
- wherein the second epitaxial source/drain and the third epitaxial source/drain are merged and are spaced apart from each of the first epitaxial source/drain and the fourth epitaxial source/drain, neither of the second epitaxial source/drain and the third epitaxial source/drain extending laterally beyond the first blocking pattern and the second blocking pattern, respectively, when extending laterally in a direction toward the first and second blocking patterns, respectively,
- wherein a width of the second isolation is less than a width of the first isolation and less than a width of the third isolation, and
- wherein a height of the first blocking pattern is substantially the same as a height of the second blocking pattern.
A semiconductor device, comprising:
- a substrate;
- a first fin on the substrate;
- a second fin on the substrate;
- a third fin on the substrate;
- a fourth fin on the substrate;
- a first isolation on the substrate, the first isolation being between the first fin and the second fin;
- a second isolation on the substrate, the second isolation being between the second fin and the third fin;
- a third isolation on the substrate, the third isolation being between the third fin and the fourth fin;
- a gate on the first fin, the second fin, the third fin, the fourth fin, the first isolation, the second isolation, and the third isolation;
- a first epitaxial source/drain on the first fin;
- a second epitaxial source/drain on the second fin;
- a third epitaxial source/drain on the third fin;
- a fourth epitaxial source/drain on the fourth fin;
- a first blocking pattern on the first isolation, the first blocking pattern contacting and extending along a side surface of each of the second fin and the second epitaxial source/drain;
- and
- a second blocking pattern on the third isolation, the second blocking pattern contacting and extending along a side surface of each of the third fin and the third epitaxial source/drain,
- wherein the second epitaxial source/drain and the third epitaxial source/drain are merged and are spaced apart from each of the first epitaxial source/drain and the fourth epitaxial source/drain, neither of the second epitaxial source/drain and the third epitaxial source/drain extending laterally beyond the first blocking pattern and the second blocking pattern, respectively, when extending laterally in a direction toward the first and second blocking patterns, respectively,
- wherein a width of the second isolation is less than a width of the first isolation and less than a width of the third isolation, and
- wherein a top portion of the first blocking pattern is at a higher level than a top portion of the second blocking pattern.
A semiconductor device, comprising:
- a substrate;
- a first fin on the substrate;
- a second fin on the substrate;
- a third fin on the substrate;
- a fourth fin on the substrate;
- a first isolation on the substrate, the first isolation being between the first fin and the second fin;
- a second isolation on the substrate, the second isolation being between the second fin and the third fin;
- a third isolation on the substrate, the third isolation being between the third fin and the fourth fin;
- a gate on the first fin, the second fin, the third fin, the fourth fin, the first isolation, the second isolation, and the third isolation;
- a first epitaxial source/drain on the first fin;
- a second epitaxial source/drain on the second fin;
- a third epitaxial source/drain on the third fin;
- a fourth epitaxial source/drain on the fourth fin;
- and
- a blocking pattern on the first isolation, the blocking pattern contacting and extending along a side surface of each of the first fin and the first epitaxial source/drain, and the first epitaxial source/drain not extending laterally beyond the blocking pattern when extending laterally in a direction toward the blocking pattern,
- wherein the second epitaxial source/drain and the third epitaxial source/drain are merged and are spaced apart from each of the first epitaxial source/drain and the fourth epitaxial source/drain,
- wherein a width of the second isolation is less than a width of the first isolation and less than a width of the third isolation, and
- wherein a top portion of the fourth epitaxial source/drain is at a higher level than a top portion of the first epitaxial source/drain.
Dependencies are inferred from the claim text.