Display panel and display device using same
AssigneeLG Display Co., Ltd.
InventorsHyundong Kim, Kyungmin Kim, Youngin Jang
Life of this patent
Estimating the term…
Abstract
A display panel includes an active area including pixels arranged along a first direction and a second direction intersecting each other and data lines and gate lines arranged to be intersected; and shift registers supplying a gate pulse to each of the gate lines, wherein each of the shift registers includes GIP circuit portions dispersedly disposed in the active area; and GIP lines supplying a predetermined signal to the GIP circuit portions or connecting the GIP circuit portions with each other, the GIP lines being located between neighboring pixels along the second direction.
Claims9
A display panel, comprising:
- an active area including pixels arranged along a first direction and a second direction intersecting each other and data lines and gate lines arranged to be intersected;
- and
- shift registers supplying a gate pulse to each of the gate lines,
- wherein each of the shift registers includes:
- GIP circuit portions dispersedly disposed in the active area;
- and
- GIP lines supplying a predetermined signal to the GIP circuit portions or connecting the GIP circuit portions with each other, the GIP lines being located between neighboring pixels along the second direction,
- wherein the active area includes a plurality of pixels arranged along the first direction and a plurality of pixel lines sequentially defined along the second direction;
- and
- the GIP lines are located between a (2n−1)-th pixel line and a 2n-th pixel line, wherein n is a natural number greater than or equal to one, and
- wherein the GIP lines include (2n−1)-th GIP lines and 2n-th GIP lines sequentially arranged along the second direction between the (2n−1)-th pixel line and the 2n-th pixel line that are neighboring along the second direction;
- the (2n−1)-th GIP lines are connected to GIP circuit portions disposed in the (2n−1)-th pixel line;
- the 2n-th GIP lines are connected to GIP circuit portions disposed in the 2n-th pixel line;
- and
- the (2n−1)-th GIP lines and the 2n-th GIP lines are symmetrically arranged with respect to a virtual reference line extending in the first direction between the (2n−1)-th pixel line and the 2n-th pixel line that are neighboring.
A display panel, comprising:
- an active area including pixels arranged along a first direction and a second direction intersecting each other and data lines and gate lines arranged to be intersected;
- and
- shift registers supplying a gate pulse to each of the gate lines,
- wherein each of the shift registers includes:
- GIP circuit portions dispersedly disposed in the active area;
- and
- GIP lines supplying a predetermined signal to the GIP circuit portions or connecting the GIP circuit portions with each other, the GIP lines being located between neighboring pixels along the second direction,
- wherein the active area includes a plurality of pixels arranged along the first direction and a plurality of pixel lines sequentially defined along the second direction;
- and
- the GIP lines are located between a (2n−1)-th pixel line and a 2n-th pixel line, wherein n is a natural number greater than or equal to one, and
- wherein the GIP lines include a 1-1 GIP line, a 1-2 GIP line, a 2-2 GIP line and a 2-1 GIP line sequentially arranged along the second direction between the (2n−1)-th pixel line and the 2n-th pixel line that are neighboring;
- the 1-1 GIP line and the 1-2 GIP line are connected to GIP circuit portions disposed in the (2n−1)-th pixel line;
- the 2-2 GIP line and the 2-1 GIP line are connected to GIP circuit portions disposed in the 2n-th pixel line;
- a same type of signal is applied to the 1-1 GIP line and the 2-1 GIP line;
- and
- a same type of signal is applied to the 1-2 GIP line and the 2-2 GIP line.
A display device, comprising:
- a display panel including an active area including pixels arranged along a first direction and a second direction intersecting each other and data lines and gate lines arranged to be intersected;
- a data driving circuit supplying data voltages to the data lines;
- and
- a gate driving circuit sequentially supplying gate pulses to the gate lines,
- wherein the gate driving circuit includes shift registers that supply a gate pulse to the gate lines;
- and
- each of the shift registers includes:
- GIP circuit portions dispersedly distributed in the active area;
- and
- GIP lines supplying a predetermined signal to the GIP circuit portions or connecting the GIP circuit portions to each other, the GIP lines being selectively located only between neighboring pixels along the second direction,
- wherein the active area includes a plurality of pixels arranged along the first direction and a plurality of pixel lines sequentially defined along the second direction;
- and
- the GIP lines are located between a (2n−1)-th pixel line and a 2n-th pixel line, wherein n is a natural number greater than or equal to one, and
- wherein the GIP lines include (2n−1)-th GIP lines and 2n-th GIP lines sequentially arranged along the second direction between the (2n−1)-th pixel line and the 2n-th pixel line that are neighboring along the second direction;
- the (2n−1)-th GIP lines are connected to GIP circuit portions disposed in the (2n−1)-th pixel line;
- the 2n-th GIP lines are connected to GIP circuit portions disposed in the 2n-th pixel line;
- and
- the (2n−1)-th GIP lines and the 2n-th GIP lines are symmetrically arranged with respect to a virtual reference line extending in the first direction between the (2n−1)-th pixel line and the 2n-th pixel line that are neighboring.
A display device, comprising:
- a display panel including an active area including pixels arranged along a first direction and a second direction intersecting each other and data lines and gate lines arranged to be intersected;
- a data driving circuit supplying data voltages to the data lines;
- and
- a gate driving circuit sequentially supplying gate pulses to the gate lines,
- wherein the gate driving circuit includes shift registers that supply a gate pulse to the gate lines;
- and
- each of the shift registers includes:
- GIP circuit portions dispersedly distributed in the active area;
- and
- GIP lines supplying a predetermined signal to the GIP circuit portions or connecting the GIP circuit portions to each other, the GIP lines being selectively located only between neighboring pixels along the second direction,
- wherein the active area includes a plurality of pixels arranged along the first direction and a plurality of pixel lines sequentially defined along the second direction;
- and
- the GIP lines are located between a (2n−1)-th pixel line and a 2n-th pixel line, wherein n is a natural number greater than or equal to one, and
- wherein the GIP lines include a 1-1 GIP line, a 1-2 GIP line, a 2-2 GIP line and a 2-1 GIP line sequentially arranged along the second direction between the (2n−1)-th pixel line and the 2n-th pixel line that are neighboring;
- the 1-1 GIP line and the 1-2 GIP line are connected to GIP circuit portions disposed in the (2n−1)-th pixel line;
- the 2-2 GIP line and the 2-1 GIP line are connected to GIP circuit portions disposed in the 2n-th pixel line;
- a same type of signal is applied to the 1-1 GIP line and the 2-1 GIP line;
- and
- a same type of signal is applied to the 1-2 GIP line and the 2-2 GIP line.
Dependencies are inferred from the claim text.