Semiconductor structure integrated with magnetic tunneling junction
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsAlexander Kalnitsky, Harry-Hak-Lay Chuang, Sheng-Haung Huang, Tien-Wei Chiang
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Abstract
The present disclosure provides a semiconductor structure. The semiconductor structure includes a substrate, a transistor region, a metal interconnect, and a magnetic tunneling junction (MTJ). The transistor region includes a gate over the substrate, and a doped region is at least partially in the substrate. The metal interconnect is over the doped region. The metal interconnect includes a metal via. The MTJ is entirely underneath the metal interconnect and between the doped region and the metal via, and a diameter of a bottom surface of the MTJ is greater than a diameter of an upper surface of the MTJ.
Claims20
A semiconductor structure, comprising:
- a substrate;
- a transistor region, comprising a gate over the substrate, and a doped region at least partially in the substrate;
- a metal interconnect over the doped region, and the metal interconnect comprises a metal via;
- and
- a magnetic tunneling junction (MTJ) entirely underneath the metal interconnect and between the doped region and the metal via, and a diameter of a bottom surface of the MTJ is greater than a diameter of an upper surface of the MTJ.
A semiconductor memory structure, comprising:
- a substrate;
- a first transistor region, comprising a first gate and a first doped region;
- a second transistor region at the same height level as the first transistor region, comprising a second gate and a second doped region;
- an interconnect layer over the first transistor region and the second transistor region;
- a first magnetic tunneling junction (MTJ) directly over the first doped region and under the interconnect layer;
- and
- a second magnetic tunneling junction (MTJ) directly over the second doped region and under the interconnect layer;
- wherein a diameter of a top of the first MTJ is greater than a diameter of a top of the second MTJ.
A semiconductor structure, comprising:
- a substrate;
- a transistor region, comprising a gate over the substrate, and a doped region at least partially in the substrate;
- a metal interconnect over the doped region, the metal interconnect comprises a metal via;
- and
- a magnetic tunneling junction (MTJ) between the doped region and the metal via, and the MTJ comprises a plurality of ferromagnetic layers and a plurality of spacers stacked alternately, and a bottom diameter of each of the ferromagnetic layers and the spacers are different.
Dependencies are inferred from the claim text.