Semiconductor device including gate separation region

A semiconductor device, comprising:

• a first active region and a second active region on a semiconductor substrate and spaced apart from each other;
• an isolation region on the semiconductor substrate, the isolation region including a region between the first active region and the second active region;
• a first gate structure overlapping the first active region and the isolation region;
• a second gate structure overlapping the second active region and the isolation region;
• and
• a gate separation region between the first gate structure and the second gate structure,
• wherein the first gate structure includes a first gate dielectric layer and a first gate electrode on the first gate dielectric layer,
• wherein the second gate structure includes a second gate dielectric layer and a second gate electrode on the second gate dielectric layer,
• wherein each of the first and second gate structures has a line shape or bar shape in a first direction,
• wherein the first gate electrode and the second gate electrode are spaced apart from each other in the first direction,
• wherein the first gate structure, the gate separation region and the second gate structure are sequentially arranged in the first direction,
• wherein the gate separation region includes a gap fill pattern and a buffer liner on side surfaces of the gap fill pattern,
• wherein the buffer liner includes a first buffer portion between the first gate electrode and the gap fill pattern, and a second buffer portion between the second gate electrode and the gap fill pattern,
• wherein the gap fill pattern includes a first insulating material, and
• wherein the buffer liner is formed of a second insulating material having a dielectric constant that is lower than a dielectric constant of the first insulating material of the gap fill pattern.