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US 11,600,349 B2Granted
Testing through-silicon-vias
AssigneeRambus Inc.
InventorsThomas Vogelsang, William Ng, Frederick A. Ware
Life of this patent
Estimating the term…
Abstract
Embodiments generally relate to integrated circuit devices having through silicon vias (TSVs). In one embodiment, an integrated circuit (IC) device includes a field of TSVs and an address decoder that selectably couples at least one of the TSVs to at least one of a test input and a test evaluation circuit. In another embodiment, a method includes selecting one or more TSVs from a field of TSVs in at least one IC device, and coupling each selected TSV to at least one of a test input and a test evaluation circuit.
Claims20
An apparatus, comprising:
- a chain of through silicon vias (TSVs) to couple a plurality of integrated circuit (IC) devices;
- and
- one or more interposers coupled between TSVs in the chain of TSVs.
A method, comprising:
- coupling a plurality of IC devices using a chain of through silicon vias (TSVs);
- and
- coupling one or more interposers between TSVs in the chain of TSVs.
An apparatus, comprising:
- a field of through silicon vias (TSVs), wherein the field of TSVs comprises a plurality of a chain of TSVs and wherein one or more interposers are coupled between TSVs in the chain of TSVs.
Dependencies are inferred from the claim text.