Display substrate and driving method thereof

A display substrate comprising:

• a base substrate, comprising a monocrystalline silicon layer, a thickness of the monocrystalline silicon layer being less than that of the base substrate;
• an array circuit layer, disposed on the base substrate and comprising a plurality of transistors, each of which has an active layer inside the monocrystalline silicon layer;
• a plurality of light-emitting elements, located at a side of the array circuit layer away from the base substrate;
• a first reflective electrode, located at a side of each of the light-emitting elements close to the base substrate, wherein the light-emitting element comprises a first electrode layer, an organic light-emitting functional layer, and a second electrode layer that are sequentially stacked in a direction from a position close to the base substrate to a position away from the base substrate, an orthographic projection of the first reflective electrode on the base substrate is at least partially overlapped with an orthographic projection of the first electrode layer on the base substrate;
• and
• a third insulating layer, located between the first reflective electrode and the first electrode layer, wherein the third insulating layer is a light transmission layer,
• wherein the display substrate comprises a display area and a peripheral area located at a periphery of the display area, the peripheral area comprises a first peripheral area and a second peripheral area, and the array circuit layer comprises a scan driving circuit located in the first peripheral area and a data driving circuit located in the second peripheral area, and a plurality of pixel sub-circuits located in the display area, and the plurality of pixel sub-circuits are connected to the plurality of light-emitting elements, respectively, to form a plurality of sub-pixels,
• the array circuit layer comprises a plurality of scan lines and a plurality of data lines, the scan driving circuit is connected to the plurality of pixel sub-circuits through the plurality of scan lines, and the data driving circuit is connected to the plurality of pixel sub-circuits through the plurality of data lines,
• wherein the array circuit layer comprises the active layer in the monocrystalline silicon layer, and a first insulating layer, a first conductive layer, a second insulating layer, and a second conductive layer that are sequentially disposed on the base substrate, the first conductive layer comprises a gate electrode of each of the plurality of transistors, the second conductive layer comprises a source electrode of each of the plurality of transistors and a drain electrode of each of the plurality of transistors, a plurality of first vias are provided in the second insulating layer, and the source electrode and the drain electrode of each of the plurality of transistors are connected to the active layer in the monocrystalline silicon layer through the plurality of first vias, respectively.