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US 11,600,232 B2Granted
Display device and gate driving circuit having a synchronization transistor
AssigneeLG Display Co., Ltd.
InventorsYewon Hong, Yeonwoo Shin, TaeWoong Moon
Life of this patent
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Abstract
One or more embodiments of the present disclosure relate to a display device and a gate driving circuit. There is further provided with a synchronization transistor controlled according to a voltage of a Q node of a m-th scan driver (e.g., a second scan driver) and controlling an electrical connection between an output terminal of the n-th light emitting driver and a clock input terminal of the m-th scan driver, so that the rising characteristic and/or the falling characteristic of the light emission signal which is a type of the gate signal can be improved, thereby improving a threshold voltage compensation performance of the driving transistor and the image quality.
Claims20
A display device comprising:
- a display panel including a plurality of data lines, a plurality of first scan lines, a plurality of second scan lines, a plurality of light emission lines, and a plurality of subpixels;
- a data driving circuit for outputting data voltages to the plurality of data lines;
- a gate driving circuit for outputting first scan signals to the plurality of first scan lines, outputting second scan signals to the plurality of second scan lines, and outputting light emission signals to the plurality of light emission lines,
- wherein the plurality of subpixels includes a plurality of subpixel rows, and the plurality of subpixel rows includes a n-th subpixel row,
- wherein the plurality of first scan lines includes a n-th first scan line corresponding to the n-th subpixel row and a m-th first scan line corresponding to a m-th subpixel row, and the plurality of second scan lines include a n-th second scan line corresponding to the n-th subpixel row and a m-th second scan line corresponding to the m-th subpixel row, and the plurality of the light emission lines includes a n-th light emission line corresponding to the n-th subpixel row and m-th light emission line corresponding to the m-th subpixel row, wherein n is a natural number and m is a natural number that is either equal to or different from n,
- wherein the gate driving circuit includes:
- a n-th gate driving circuit including a n-th first scan driver for outputting a n-th first scan signal to the n-th first scan line, a n-th second scan driver for outputting a n-th second scan signal to the n-th second scan line, and a n-th light emitting driver for outputting a n-th light emission signal to the n-th light emission line;
- a m-th gate driving circuit including a m-th first scan driver for outputting a m-th first scan signal to the m-th first scan line, a m-th second scan driver for outputting a m-th second scan signal to the m-th second scan line, and a m-th light emitting driver for outputting a m-th light emission signal to the m-th light emission line;
- and
- a synchronization transistor controlled based on a voltage of a gate node of the m-th second scan driver and controlling an electrical connection between an output terminal of the n-th light emitting driver and a clock input terminal of the m-th second scan driver.
7 more elements
A gate driving circuit comprising:
- a n-th light emitting driver for outputting a n-th light emission signal to a n-th light emission line arranged in a n-th subpixel row, wherein n is a natural number;
- a m-th scan driver for outputting a m-th scan signal to a m-th scan line arranged in a m-th subpixel row which is either the same as or different from the n-th subpixel row, wherein m is a natural number;
- and
- a synchronization transistor controlled based on a voltage of a Q node of the m-th scan driver and controlling an electrical connection between an output terminal of the n-th light emitting driver and a clock input terminal of the m-th scan driver.
1 more element
A device comprising:
- a first subpixel, the first subpixel including:
- a driving transistor having a first node, a second node, and a third node;
- a light emitting diode coupled to the second node of the driving transistor;
- a first transistor configured to provide a data signal from a data line to the first node of the driving transistor based on a first scan signal from a first scan line;
- a second transistor configured to provide an initialization voltage from an initialization line to the second node of the driving transistor based on a second scan signal from a second scan line;
- a third transistor coupled to the third node of the driving transistor, the third transistor configured to provide a driving voltage to the third node of the driving transistor based on a light emission signal from an emission line;
- a first capacitor coupled between the first node and the second node of the driving transistor;
- a second capacitor coupled the second node of the driving transistor and a driving line;
- a first gate driving circuit, the first gate driving circuit including:
- a light emitting driver for outputting the light emission signal to the light emission line;
- a first scan driver for outputting the first scan signal to the first scan line;
- and
- a second scan driver for outputting the second scan signal to the second scan line;
- and
- a second subpixel, the second subpixel including:
- a second driving transistor having a first node, a second node, and a third node;
- a second light emitting diode coupled to the second node of the second driving transistor;
- a fourth transistor configured to provide a data signal from a data line to the first node of the second driving transistor based on a third scan signal to a third scan line;
- and
- a fifth transistor configured to provide an initialization voltage from an initialization line to the second node of the second driving transistor based on a fourth scan signal to a fourth scan line,
- wherein the second subpixel is coupled to a second gate driving circuit, the second gate driving circuit includes:
- a third scan driver for outputting the third scan signal to the third scan line;
- and
- a fourth scan driver for outputting the fourth scan signal to the fourth scan line, and
- wherein the device further includes a synchronization transistor coupled to the light emitting driver in the first subpixel and the fourth scan driver of the second subpixel.
22 more elements
Dependencies are inferred from the claim text.