Pixel and organic light emitting diode display device

An organic light emitting diode display device comprising:

• a display panel including a pixel;
• a data driver configured to provide a data voltage to the pixel;
• a gate driver configured to provide a gate signal to the pixel;
• and
• a driving controller configured to control the data driver and the gate driver,
• wherein the pixel includes:
• a first capacitor including a first electrode to which a first power supply voltage is applied and a second electrode connected to a first node;
• a first transistor including a gate electrode connected to the first node, a first electrode connected to a second node, and a second electrode connected to a third node;
• a second transistor including a gate electrode to which a data write gate signal is applied, a first electrode to which a data voltage is applied, and a second electrode connected to the second node;
• a third transistor connected between the first node and the third node, and configured to diode-connect the first transistor in response to the data write gate signal;
• a fourth transistor connected between the first node and an initialization voltage input terminal to which an initialization voltage is applied, and configured to transmit the initialization voltage to the first node in response to a data initialization gate signal;
• an eighth transistor connected to the third transistor and the fourth transistor, and configured to control a current flowing through the third transistor and a current flowing through the fourth transistor in response to an emission bias signal;
• and
• an organic light emitting diode including an anode electrode and a cathode electrode to which a second power supply voltage is applied,
• wherein the third transistor includes a first sub-transistor and a second sub-transistor which are connected in series between the first node and the third node,
• wherein the fourth transistor includes a third sub-transistor and a fourth sub-transistor which are connected in series between the first node and the initialization voltage input terminal, and
• wherein the eighth transistor includes a gate electrode to which the emission bias signal is applied, a first electrode connected to a third transistor node disposed between the first sub-transistor and the second sub-transistor, and a second electrode connected to a fourth transistor node disposed between the third sub-transistor and the fourth sub-transistor.