Bi-directional voltage converter of smart card and smart card including the same
AssigneeSamsung Electronics Co., Ltd.
InventorsEunsang Jang, Junho Kim, Jisoo Chang
Life of this patent
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Abstract
A bi-directional voltage converter of a smart card includes switching elements connected between an input node and an output node and a start-up transistors whose channel width over channel length is smaller than a channel width over channel length of the switching element. The bi-directional voltage converter stores a driving voltage applied to an output node in a storage capacitor during a booting operation and provides the voltage stored in the storage capacitor to an input node. The bi-directional voltage converter may boost another driving voltage at the input node step-wisely and may perform bi-directional voltage converting with reduced occupied area and high efficiency.
Claims16
A bi-directional voltage converter of a smart card configured to perform a fingerprint authentication, the bi-directional voltage converter comprising:
- a gate driving circuit configured to generate first through fourth clock signals based on a first output signal, a second output signal, a first sub power-down signal and a second sub power-down signal, the first output signal and the second output signal having non-overlapping activation intervals with each other, and at least some of the first through fourth clock signals having non-overlapping activation intervals with one another;
- a switching circuit including first through fourth switching elements connected in series between an input node and a ground voltage, the first through fourth switching elements configured to be switched in response to respective ones of the first through fourth clock signals and configured to store an output voltage applied to an output node in a storage capacitor coupled between a first node and a second node, in a boosting operation;
- and
- a start-up circuit including a first start-up transistor and a second start-up transistor connected in series between the input node and the output node, the first start-up transistor and the second start-up transistor configured to be switched in response to a first delayed clock signal and a second delayed clock signal to provide the output voltage stored in the storage capacitor to the input node in the boosting operation, and the first delayed clock signal and the second delayed clock signal having non-overlapping activation intervals with each other.
A bi-directional voltage converter of a smart card configured to perform a fingerprint authentication, the bi-directional voltage converter comprising:
- a dead time generator configured to generate a first output signal and a second output signal having non-overlapping activation intervals with each other based on a reference clock signal;
- a gate driving circuit configured to generate first through fourth clock signals based on the first output signal, the second output signal, a first sub power-down signal and a second sub power-down signal, at least some of the first through fourth clock signals having non-overlapping activation intervals with one another;
- a switching circuit including first through fourth switching elements connected in series between an input node and a ground voltage, the first through fourth switching elements configured to be switched in response to respective ones of the first through fourth clock signals, and configured to store an output voltage applied to an output node in a storage capacitor coupled between a first node and a second node, in a boosting operation;
- a start-up circuit including a first start-up transistor and a second start-up transistor connected in series between the input node and the output node, the first start-up transistor and the second start-up transistor configured to be switched in response to a first delayed clock signal and a second delayed clock signal to provide the output voltage stored in the storage capacitor to the input node in the boosting operation, the first delayed clock signal and the second delayed clock signal having non-overlapping activation intervals with each other;
- and
- a delayed clock signal generation circuit configured to generate the first delayed clock signal and the second delayed clock signal based on the first output signal, the second output signal and the second sub power-down signal.
Dependencies are inferred from the claim text.