Last-level collective hardware prefetching
AssigneeThe Regents of the University of California
InventorsGeorgios Michelogiannakis, John Shalf
Life of this patent
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Abstract
A last-level collective hardware prefetcher (LLCHP) is described. The LLCHP is to detect a first off-chip memory access request by a first processor core of a plurality of processor cores. The LLCHP is further to determine, based on the first off-chip memory access request, that first data associated with the first off-chip memory access request is associated with second data of a second processor core of the plurality of processor cores. The LLCHP is further to prefetch the first data and the second data based on the determination.
Claims18
A multi-core computer processor comprising:
- a plurality of processor cores interconnected in a Network-on-Chip (NoC) architecture;
- and
- a hardware prefetcher operatively coupled to the plurality of processor cores and to a cache, wherein the hardware prefetcher is to:
- detect a first off-chip memory access request by a first processor core of the plurality of processor cores;
- determine, based on the first off-chip memory access request, that first data associated with the first off-chip memory access request is associated with second data of a second processor core of the plurality of processor cores;
- and
- prefetch the first data and the second data based on the determination,
- wherein to determine that the first data associated with the first off-chip memory access request is associated with the second data of the second processor core of the plurality of processor cores, the hardware prefetcher is to:
- determine that a stride entry exists for the first off-chip memory access request;
- and
- determine that a group exists for the stride entry.
A multi-core computer processor comprising:
- a plurality of processor cores interconnected in a Network-on-Chip (NoC) architecture;
- and
- a hardware prefetcher operatively coupled to the plurality of processor cores and to a cache, wherein the hardware prefetcher is to:
- detect a first off-chip memory access request by a first processor core of the plurality of processor cores;
- determine, based on the first off-chip memory access request, that first data associated with the first off-chip memory access request is associated with second data of a second processor core of the plurality of processor cores;
- prefetch the first data and the second data based on the determination;
- detect a second off-chip memory access request by the first processor core;
- determine, based on the second off-chip memory access request, that third data associated with the second off-chip memory access request is not associated with any additional data of the second processor core;
- and
- prefetch only the third data based on the determination.
A method of prefetching data in a multi-core computer processor, the method comprising:
- detecting, by a hardware prefetcher of the multi-core processor, a first off-chip memory access request by a first processor core of a plurality of processor cores of the multi-core processor;
- determining, based on the first off-chip memory access request, that first data associated with the first off-chip memory access request is associated with second data of a second processor core of the plurality of processor cores;
- and
- prefetching the first data and the second data based on the determination,
- wherein determining that the first data associated with the first off-chip memory access request is associated with the second data of the second processor core of the plurality of processor cores comprises:
- determining that a stride entry exists for the first off-chip memory access request;
- and
- determining that a group exists for the stride entry.
A method of prefetching data in a multi-core computer processor, the method comprising:
- detecting, by a hardware prefetcher of the multi-core processor, a first off-chip memory access request by a first processor core of a plurality of processor cores of the multi-core processor;
- determining, based on the first off-chip memory access request, that first data associated with the first off-chip memory access request is associated with second data of a second processor core of the plurality of processor cores;
- prefetching the first data and the second data based on the determination;
- detecting a second off-chip memory access request by the first processor core;
- determining, based on the second off-chip memory access request, that third data associated with the second off-chip memory access request is not associated with any additional data of the second processor core;
- and
- prefetching only the third data based on the determination.
Dependencies are inferred from the claim text.