Cache memory architecture and management
AssigneeEMC IP Holding Company LLC
InventorsMichael Scharland, Mark Halstead, Rong Yu, Peng Wu, Benjamin Yoder, Kaustubh Sahasrabudhe
Life of this patent
Estimating the term…
Loading patent…
AssigneeEMC IP Holding Company LLC
InventorsMichael Scharland, Mark Halstead, Rong Yu, Peng Wu, Benjamin Yoder, Kaustubh Sahasrabudhe
Estimating the term…
Aspects of the present disclosure relate to data cache management. In embodiments, a storage array's memory is provisioned with cache memory, wherein the cache memory includes one or more sets of distinctly sized cache slots. Additionally, a logical storage volume (LSV) is established with at least one logical block address (LBA) group. Further, at least one of the LSV's LBA groups is associated with two or more distinctly sized cache slots based on an input/output (IO) workload received by the storage array.
A method comprising:
An apparatus comprising a memory and processor configured to:
Dependencies are inferred from the claim text.
Drawings are temporarily unavailable. Open the PDF at USPTO
From the US filing history. Foreign family members aren’t listed.
In hierarchically structured memory systems, e.g. virtual memory systems: addressing of a memory level in which the access to the desired data or…
Improving I/O performance: in relation to response time
Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices: data buffering…
Plurality of storage devices: non-volatile semiconductor memory arrays
About 14 years 9 months of term left · ends 26 Jul 2041 (estimated)
A storage array is a data storage system that includes multiple storage drives (e.g., hard disk drives (HDDs), solid-state drives (SSDs)), and memory such as random-access memory (RAM) or dynamic RAM (DRAM). Storage array system allows the separation of data storage from computing devices. The break of data storage from computing devices enables multiple users to collaborate and share information in a scalable manner. A storage array can include a storage and memory management system that controls data storage and access to the array's storage drives and memory. In addition, the storage and memory management system can have an operating system that manages a storage array's memory, processes, software, hardware, and communications.
Aspects of the present disclosure relate to data cache management. In embodiments, a storage array's memory is provisioned with cache memory, wherein the cache memory includes one or more sets of distinctly sized cache slots. Additionally, a logical storage volume (LSV) is established with at least one logical block address (LBA) group. Further, at least one of the LSV's LBA groups is associated with two or more distinctly sized cache slots based on an input/output (IO) workload received by the storage array.
An initial storage array resource profile can be generated in embodiments based on the storage array's intended use characteristics. Additionally, the cache memory can be provisioned with one or more sets of distinctly sized cache slots using the initial storage array resource profile.
FIG. 1 is a block diagram of a storage array in accordance with embodiments of the present disclosure.
FIG. 2 is a block diagram of a memory controller in accordance with embodiments of the present disclosure.
FIG. 3 is a block diagram of a storage array's director boards in accordance with embodiments of the present disclosure.
Organizations often choose to use decentralized storage array solutions to store and manage their data. A storage array can include multiple storage drives such as hard disk drives (HDDs) or solid-state drives (SSDs). However, not all storage drives are created equal and can have different performance characteristics (e.g., time taken to complete a storage request). During a business day, an organization can issue large volumes of data requests to a storage array. The data requests can correspond to a request to read data from or write (e.g., store) data to the storage array. Further, the array 105 can receive high occurrences of data requests related to specific data objects (e.g., high-demand files or applications).
Accordingly, the arrays can include memory controllers that temporarily store copies of high-demand data in the array's fast-access memory (e.g., global memory) with significantly greater performance characteristics than HDDs or SSDs. Unfortunately, current memory controllers use naïve memory management techniques to establish statically sized cache slots, resulting in inefficient memory utilization. For example, the array's memory can include 128 KB-sized cache slots (128 KB cache slot). Consequently, such a memory controller can use a 128 KB cache slot to store an 8 KB high-demand data object. Thus, the memory controller has inefficiently allocated 120 KB of cache memory to store an 8 KB data object.
As disclosed in greater detail herein, embodiments of the present disclosure relate to cache memory management techniques that can establish variably sized cache slot pools. For example, the embodiments disclosed herein can assign each logical block address (LBA) in an LBA group (e.g., range) with distinctly sized cache slots (e.g., 64 KB, 16 KB, or 8 KB). For example, the embodiments can establish predictive IO workload models that anticipate IO request sizes. Based on the predicted IO request sizes, the embodiments can dynamically allocate one or more LBAs in a group with a distinctly sized cache slot. For instance, the embodiments can perform the allocations as a function of a current workload's IO request sizes. Further, the embodiments can dynamically rebalance or re-allocation variably sized cache slots and LBA mappings based on an anticipated (e.g., next/future) IO workload's IO request sizes.