Decoding circuit module, memory control circuit unit and memory storage device

A memory control circuit unit, configured to control a rewritable non-volatile memory module, the memory control circuit unit comprising:

• a host interface configured to be coupled to a host system;
• a memory interface configured to be coupled to the rewritable non-volatile memory module;
• a decoding circuit module coupled to the rewritable non-volatile memory module and configured to decode data read from the rewritable non-volatile memory module;
• and
• a memory management circuit coupled to the host interface, the memory interface, and the decoding circuit module,
• wherein the decoding circuit module comprises:
• a first buffer coupled to the rewritable non-volatile memory module;
• a second buffer coupled to the first buffer;
• a first decoding circuit coupled to the first buffer and the second buffer;
• and
• a second decoding circuit coupled to the second buffer,
• wherein the first decoding circuit is configured to decode first data read from the rewritable non-volatile memory module and stored in the first buffer,
• the second decoding circuit is configured to decode second data read from the rewritable non-volatile memory module and stored in the second buffer,
• a data decoding ability of the first decoding circuit is different from a data decoding ability of the second decoding circuit, and
• the second data is stored in the second buffer via the first buffer and is not decoded by the first decode circuit.

A memory storage device, comprising:

• a connection interface unit configured to be coupled to a host system;
• a rewritable non-volatile memory module;
• and
• a memory control circuit unit coupled to the connection interface unit and the rewritable non-volatile memory module,
• wherein the memory control circuit unit comprises a decoding circuit module,
• the decoding circuit module comprises:
• a first buffer coupled to the rewritable non-volatile memory module;
• a second buffer coupled to the first buffer;
• a first decoding circuit coupled to the first buffer and the second buffer;
• and
• a second decoding circuit coupled to the second buffer,
• wherein the first decoding circuit is configured to decode first data read from the rewritable non-volatile memory module and stored in the first buffer,
• the second decoding circuit is configured to decode second data read from the rewritable non-volatile memory module and stored in the second buffer,
• a data decoding ability of the first decoding circuit is different from a data decoding ability of the second decoding circuit, and
• the second data is stored in the second buffer via the first buffer and is not decoded by the first decode circuit.