Post package repair failure memory location reporting system
AssigneeDell Products L.P.
InventorsChing-Lung Chao, Shih-Hao Wang, Hung-Tah Wei
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AssigneeDell Products L.P.
InventorsChing-Lung Chao, Shih-Hao Wang, Hung-Tah Wei
Estimating the term…
A PPR memory location reporting system includes BIOS coupled to a non-volatile memory system and a volatile memory system. During boot operations, the BIOS identifies a memory location identifier in the non-volatile memory system for a memory location that is included in the volatile memory system and that is associated with PPR, performs PPR operations on the memory location, and determines that the PPR operations on the memory location have failed. In response to determining that the PPR operations on the memory location have failed, the BIOS stores the memory location identifier in a boot error report table that is configured for use by an operating system to prevent use of the memory location by the operating system, and reserves the memory location identifier in a memory map that is configured for use by the operating system to prevent use of the memory location by the operating system.
A Post Package Repair (PPR) memory location reporting system, comprising:
An Information Handling System (IHS), comprising:
A method for reporting Post Package Repair (PPR) failure memory locations, comprising:
Dependencies are inferred from the claim text.
From the US filing history. Foreign family members aren’t listed.
No references of this kind are recorded.
Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of…
The processing taking place on a specific hardware platform or in a specific software environment: in a storage system, e.g. in a DASD or network…
The processing taking place on a specific hardware platform or in a specific software environment: in a memory management context, e.g. virtual…
Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of…
About 13 years 9 months of term left · ends 22 Jul 2040 (estimated)
The present disclosure relates generally to information handling systems, and more particularly to reporting memory locations in an information handling system for which Post Package Repair (PPR) has failed.
As the value and use of information continues to increase, individuals and businesses seek additional ways to process and store information. One option available to users is information handling systems. An information handling system generally processes, compiles, stores, and/or communicates information or data for business, personal, or other purposes thereby allowing users to take advantage of the value of the information. Because technology and information handling needs and requirements vary between different users or applications, information handling systems may also vary regarding what information is handled, how the information is handled, how much information is processed, stored, or communicated, and how quickly and efficiently the information may be processed, stored, or communicated. The variations in information handling systems allow for information handling systems to be general or configured for a specific user or specific use such as financial transaction processing, airline reservations, enterprise data storage, or global communications. In addition, information handling systems may include a variety of hardware and software components that may be configured to process, store, and communicate information and may include one or more computer systems, data storage systems, and networking systems.
Information handling systems such as server computing devices, desktop computing devices, laptop/notebook computing devices, tablet computing devices, mobile phones, and/or other computing devices known in the art, sometimes experience memory system issues that result in unavailable memory locations in their memory system. For example, volatile memory devices such as Dual Data Rate (DDR) Dual Inline Memory Modules (DIMMs) include Dynamic Random Access Memory (DRAM) that can fail, “go bad”, and/or otherwise become unavailable such that a corresponding memory location (e.g., a memory row) provided by that DRAM in the DIMMs becomes unavailable as well. Unavailable memory locations provided by a DRAM can be remedied using Post Package Repair (PPR), which operates to replace the unavailable memory location in the memory system provided by the DRAM with an available memory location provided in a DRAM in the DIMMs that is reserved for PPR operations. However, conventional memory systems typically include between 10-20 reserved memory locations (e.g., reserved memory rows), and once all of those reserved memory locations have been used to replace unavailable memory locations, subsequent PPR operations for subsequently unavailable memory locations will fail, resulting in the memory system operating with the unavailable memory location. As will be appreciated by one of skill in the art in possession of the present disclosure, operation of the memory system with the unavailable memory location can result in memory errors if the unavailable memory location is accessed (e.g., by the operating system in the computing device).
FIG. 1 is a schematic view illustrating an embodiment of an Information Handling System (IHS).
FIG. 2 is a schematic view illustrating an embodiment of a computing device that may utilize the Post Package Repair (PPR) failure memory location reporting system of the present disclosure.
FIG. 3 is a schematic view illustrating an embodiment of a volatile memory system that may be include in the computing device of FIG. 2.
For purposes of this disclosure, an information handling system may include any instrumentality or aggregate of instrumentalities operable to compute, calculate, determine, classify, process, transmit, receive, retrieve, originate, switch, store, display, communicate, manifest, detect, record, reproduce, handle, or utilize any form of information, intelligence, or data for business, scientific, control, or other purposes. For example, an information handling system may be a personal computer (e.g., desktop or laptop), tablet computer, mobile device (e.g., personal digital assistant (PDA) or smart phone), server (e.g., blade server or rack server), a network storage device, or any other suitable device and may vary in size, shape, performance, functionality, and price. The information handling system may include random access memory (RAM), one or more processing resources such as a central processing unit (CPU) or hardware or software control logic, ROM, and/or other types of nonvolatile memory. Additional components of the information handling system may include one or more disk drives, one or more network ports for communicating with external devices as well as various input and output (I/O) devices, such as a keyboard, a mouse, touchscreen and/or a video display. The information handling system may also include one or more buses operable to transmit communications between the various hardware components.
In one embodiment, IHS 100, FIG. 1, includes a processor 102, which is connected to a bus 104. Bus 104 serves as a connection between processor 102 and other components of IHS 100. An input device 106 is coupled to processor 102 to provide input to processor 102. Examples of input devices may include keyboards, touchscreens, pointing devices such as mouses, trackballs, and trackpads, and/or a variety of other input devices known in the art. Programs and data are stored on a mass storage device 108, which is coupled to processor 102. Examples of mass storage devices may include hard discs, optical disks, magneto-optical discs, solid-state storage devices, and/or a variety of other mass storage devices known in the art. IHS 100 further includes a display 110, which is coupled to processor 102 by a video controller 112. A system memory 114 is coupled to processor 102 to provide the processor with fast storage to facilitate execution of computer programs by processor 102. Examples of system memory may include random access memory (RAM) devices such as dynamic RAM (DRAM), synchronous DRAM (SDRAM), solid state memory devices, and/or a variety of other memory devices known in the art. In an embodiment, a chassis 116 houses some or all of the components of IHS 100. It should be understood that other buses and intermediate circuits can be deployed between the components described above and processor 102 to facilitate interconnection between the components and the processor 102.
Referring now to FIG. 2, an embodiment of a computing device 200 is illustrated that may utilize the PPR failure memory location reporting system of the present disclosure. In an embodiment, the computing device 200 may be provided by the IHS 100 discussed above with reference to FIG. 1 and/or may include some or all of the components of the IHS 100, and in specific examples may be provided by a server computing device, a desktop computing device, a laptop/notebook computing device, a tablet computing device, a mobile phone, and/or any other computing device that would be apparent to one of skill in the art in possession of the present disclosure. Furthermore, while illustrated and discussed as being provided by particular computing devices, one of skill in the art in possession of the present disclosure will recognize that the functionality of the computing device 200 discussed below may be provided by other devices that are configured to operate similarly as the computing device 200 discussed below. In the illustrated embodiment, the computing device 200 includes a chassis 202 that houses the components of the computing device 200, only some of which are illustrated below.
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