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US 11,599,300 B2Granted
Voltage threshold prediction-based memory management
AssigneeMicron Technology, Inc.
InventorsChun Sum Yeung, Guang Hu, Ting Luo, Tao Liu
Life of this patent
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Abstract
A method includes performing a first read operation involving a set of memory cells using a first voltage, determining a quantity of bits associated with the set of memory cells based on the first read operation, performing a second read operation involving the set of memory cells using a second voltage that is greater than the first voltage when the quantity of bits is above a threshold quantity of bits for the set of memory cells, and performing the second read operation involving the set of memory cells using a third voltage that is less than the first voltage when the quantity of bits is below the threshold quantity of bits for the set of memory cells.
Claims20
A method, comprising:
- performing a first read operation involving a set of memory cells using a first voltage;
- determining a quantity of bits associated with the set of memory cells based on the first read operation;
- predicting a shift in a voltage threshold associated with the set of memory cells based on performance of the first read operation and the determined quantity of bits associated with the set of memory cells based on the first read operation;
- performing a second read operation involving the set of memory cells using a second voltage that is greater than the first voltage in response to determining that the quantity of bits is above a threshold quantity of bits for the set of memory cells based on the predicted shift in the voltage associated with the set of memory cells;
- and
- performing the second read operation involving the set of memory cells using a third voltage that is less than the first voltage in response to determining that the quantity of bits is below the threshold quantity of bits for the set of memory cells based on the predicted shift in the voltage associated with the set of memory cells.
3 more elements
An apparatus, comprising:
- a voltage threshold prediction component configured to:
- perform a first read operation involving a set of memory cells using a first threshold voltage that targets a particular memory cell from the set of memory cells;
- determine a quantity of bits of the set of memory cells based on the first read operation using the first threshold voltage;
- determine a first threshold quantity of bits for the set of memory cells based on the first threshold voltage;
- determine a second threshold quantity of bits for the set of memory cells based on the first threshold voltage;
- predict a shift in a voltage threshold associated with the set of memory cells based on performance of the first read operation using the first threshold voltage that targets the particular memory cell from the set of memory cells;
- determine a second threshold voltage to be utilized for a second read operation based on a comparison between the determined quantity of bits and the first threshold quantity of bits and the second threshold quantity of bits and the predicted shift in the voltage associated with the set of memory cells based on performance of the first read operation using the first threshold voltage;
- and
- perform the second read operation using the second threshold voltage.
6 more elements
A system, comprising:
- a plurality of memory components arranged to form a stackable cross-gridded array of interleaved NAND memory cells;
- and
- a processing device coupled to the plurality of memory components, the processing device to perform operations comprising:
- performing a first single level cell (SLC) read involving a set of memory cells using a first threshold voltage to target a particular memory cell of the set of memory cells;
- determining a quantity of bits of the set of memory cells based on the first SLC read using the first threshold voltage;
- determining an upper bit count threshold and a lower bit count threshold for the set of memory cells based on the first threshold voltage;
- predicting a shift in a voltage threshold associated with the set of memory cells based on performance of the first SLC read involving the set of memory cells using the first threshold voltage;
- performing a first set of SLC reads involving the set of memory cells using a first set of threshold voltages based on the predicted shift in the voltage threshold associated with the set of memory cells based on performance of the first SLC read involving the set of memory cells using the first threshold voltage, wherein the set of threshold voltages comprise:
- a set of positive offsets when the determined quantity of bits is greater than the upper bit count threshold;
- a set of negative offsets when the determined quantity of bits is less than the lower bit count threshold;
- or
- a combination of positive and negative offsets when the determined quantity of bits is between the upper bit count threshold and the lower bit count threshold, or any combination thereof;
- and
- determining a second set of threshold voltages to be utilized for a second set of SLC reads based on a comparison between the determined quantity of bits and the upper bit count threshold and the lower bit count threshold and the predicted shift in the voltage associated with the set of memory cells based on performance of the first set of SLC reads using the first set of threshold voltages.
11 more elements
Dependencies are inferred from the claim text.