Storage device and method of operating the same
AssigneeSK hynix Inc.
InventorBo Kyeong Kim
Life of this patent
Estimating the term…
Abstract
The present technology relates to an electronic device. According to the present technology, a storage device having an improved operation speed includes a memory device including a plurality of memory areas, a buffer memory configured to store first parity information including a parity for data stored in each of one or more first memory areas among the plurality of memory areas, and a memory controller configured to store second parity information including a parity for data stored in each of one or more second memory areas except for the one or more first memory areas among the plurality of memory areas and control the memory device to store, when a sudden power off occurs, dump parity information including some of the first parity information and the second parity information.
Claims15
A storage device comprising:
- a memory device including a plurality of memory areas;
- a buffer memory configured to store first parity information including a parity for data stored in each of one or more first memory areas among the plurality of memory areas;
- and
- a memory controller configured to store second parity information including a parity for data stored in each of one or more second memory areas except for the one or more first memory areas among the plurality of memory areas, control the memory device to store, when a sudden power off occurs, dump parity information including the second parity information, receive the dump parity information from the memory device in response to power-on after the sudden power off occurs, and regenerate, when a parity for data corresponding to a request input from a host does not exist in the dump parity information stored in the memory controller after power is turned on, the parity for the data corresponding to the request input from the host.
A memory controller that controls a buffer memory and a memory device including a plurality of memory areas, the memory controller comprising:
- a parity information controller configured to:
- provide first parity information including a parity for data stored in each of one or more first memory areas among the plurality of memory areas to the buffer memory, and
- store second parity information including a parity for data stored in each of one or more second memory areas except for the one or more first memory areas among the plurality of memory areas;
- and
- a sudden power off controller configured to control the memory device to store dump parity information including the second parity information when a sudden power off occurs and provide the dump parity information to the parity information controller when power is turned on after the sudden power off occurs,
- wherein the parity information controller regenerates, when a parity for data corresponding to a request input from a host does not exist in the dump parity information stored in the parity information controller after the power is turned on, the parity for the data corresponding to the request input from the host.
A method of operating a storage device, the method comprising:
- storing parity information including a parity for data, which is stored in a plurality of memory areas, in a buffer memory and a memory controller;
- sensing a sudden power off;
- storing the parity information in a memory device in response to the sudden power off;
- providing the parity information stored in the memory device to the memory controller in response to power-on after the sudden power off;
- and
- regenerating a parity for data corresponding to a request input from a host in response to the parity for the data corresponding to the request input from the host does not exist in the parity information provided to the memory controller.
Dependencies are inferred from the claim text.