Internet of things (IoT) power and performance management technique and circuit methodology

A battery powered electronic device comprising:

• internal circuitry including a plurality of transistors;
• and
• power saving circuitry coupled to the internal circuitry, wherein the power saving circuitry is configured to apply a first effective voltage across the internal circuitry during a non-idle state of the internal circuitry, and apply a second effective voltage across the internal circuitry during an idle state of the internal circuitry, wherein the second effective voltage is less than the first effective voltage, and wherein the second effective voltage is selected to ensure that data stored by the internal circuitry is retained during the idle state,
• wherein the power saving circuitry comprises:
• a first transistor configured to turn on to couple a first nominal supply voltage terminal to a first internal supply node used to power the internal circuitry during the non-idle state;
• and
• a second transistor configured to couple the first nominal supply voltage terminal to the first internal supply node in a source-follower configuration during the idle state,
• wherein the plurality of transistors of the internal circuitry have sources coupled to receive power from the first internal supply node and have body regions coupled to receive a first body bias control voltage, wherein the first body bias control voltage is controlled to forward bias the body-to-source junctions of the plurality of transistors during the non-idle state, and wherein the first body bias control voltage is changed to reverse bias the body regions of the plurality of transistors during the idle state.

A battery powered device comprising:

• internal circuitry;
• a first internal voltage supply node coupled to the internal circuitry, wherein a first internal supply voltage applied to the first internal voltage supply node is applied to the internal circuitry;
• means for increasing the first internal supply voltage applied to the first internal voltage supply node to a first nominal supply voltage from a voltage lower than the first nominal supply voltage during a transition from an idle state to a non-idle state of the battery powered device;
• a second internal voltage supply node coupled to the internal circuitry, wherein a second internal supply voltage applied to the second internal voltage supply node is applied to the internal circuitry;
• and
• means for reducing the second internal supply voltage applied to the second internal voltage supply node to a second nominal supply voltage from a voltage higher than the second nominal supply voltage during the transition from the idle state to the non-idle state of the battery powered device.

A battery powered device comprising:

• internal circuitry including p-channel transistors and n-channel transistors;
• a first internal voltage supply node coupled to the internal circuitry, wherein the first internal voltage supply node supplies power to the internal circuitry during both an idle state and a non-idle state of the battery powered device;
• a first transistor configured to turn on and apply a first supply voltage to the first internal voltage supply node during the non-idle state;
• a second transistor having a first threshold voltage, wherein the second transistor is configured to apply a first idle supply voltage to the first internal voltage supply node during the idle state, wherein the first idle supply voltage differs from the first supply voltage by the first threshold voltage;
• a second internal voltage supply node coupled to the internal circuitry, wherein the second internal voltage supply node supplies power to the internal circuitry during both the idle state and the non-idle state of the battery powered device;
• a third transistor configured to apply a second supply voltage to the second internal voltage supply node during the non-idle state;
• and
• a fourth transistor having a second threshold voltage, wherein the fourth transistor is configured to apply a second idle supply voltage to the second internal voltage supply node during the idle state, wherein the second idle supply voltage differs from the second supply voltage by the second threshold voltage,
• wherein the p-channel transistors of the internal circuitry have sources coupled to receive power from the first internal supply node and have body regions coupled to receive a first body bias control voltage, wherein the first body bias control voltage is controlled to forward bias the body-to-source junctions of the p-channel transistors during the non-idle state, and wherein the first body bias control voltage is changed to reverse bias the body regions of the p-channel transistors during the idle state;
• and
• wherein the n-channel transistors of the internal circuitry have sources coupled to receive power from the second internal supply node and have body regions coupled to receive a second body bias control voltage, wherein the second body bias control voltage is controlled to forward bias the body-to-source junctions of the re-channel transistors during the non-idle state, and wherein the second body bias control voltage is changed to reverse bias the body regions of the n-channel transistors during the idle state.