Print component with memory circuit

A print component comprising:

• a fluidic ejection circuit to receive a plurality of operating signals from a printer via a plurality of signal paths, the plurality of signal paths including an analog signal path, the fluidic ejection circuit including;
• an array of fluid actuators;
• and
• an array of memory elements;
• and
• a memory circuit
• a plurality of I/O pads to connect to the plurality of signal paths, including a first analog pad and a second analog pad connected to the analog signal path, the first analog pad electrically isolated from the second analog pad to interrupt the analog signal path to the fluidic ejection circuit;
• a memory component to store memory values associated with the print component;
• and
• a control circuit in communication with the memory component and at least a portion of the I/O pads, in response to identifying a sequence of operating signals on the plurality of signal paths received via the I/O pads representing a memory read of selected memory elements of the fluidic ejection circuit, to provide to the first analog signal pad an analog signal having an analog electrical value representing stored memory values stored on the memory component corresponding to the memory read.

A print component comprising:

• a plurality of fluidic ejection dies to receive a plurality of operating signals from a printer via a plurality of signal paths, the plurality of signal paths including a separate data signal path for each fluidic ejection die and an analog signal path shared by each fluidic ejection die, each fluidic ejection die including:
• an array of fluid actuators;
• and
• an array of memory elements, each memory element comprising a data bit having a bit value;
• and
• a memory circuit separate from the fluidic ejection dies, the memory circuit including:
• a plurality of I/O pads to connect to the plurality of signal paths, including a first analog pad and a second analog pad connected to the analog signal path, the first analog pad electrically isolated from the second analog pad to interrupt the analog signal path to the fluidic ejection dies;
• a memory component to store memory values associated with the print component, each memory value of a portion of the memory values corresponding to a different one of the memory elements of the plurality of fluidic ejection dies, where the memory value stored on the memory component may be different from the bit value of the corresponding memory element of the fluidic ejection die;
• and
• a control circuit in communication with the memory component and at least a portion of the I/O pads, in response to identifying a sequence of operating signals on the plurality of signal paths via the I/O pads representing a memory read of selected memory elements of the plurality of fluidic die, the control circuit to provide to the first analog signal path an analog signal having an analog electrical value representing stored memory values on the memory component corresponding to the memory read.