Wafer level ultrasonic chip module and manufacturing method thereof

A wafer level ultrasonic chip module, comprising:

• a substrate comprising a through slot, the through slot passing through an upper surface of the substrate and a lower surface of the substrate;
• a composite layer located on the substrate, the composite layer comprising an ultrasonic body and a protective layer, wherein the ultrasonic body is located on the upper surface of the substrate and a lower surface of the ultrasonic body is exposed from the through slot, the protective layer covers the ultrasonic body and a partial upper surface of the substrate, the protective layer has an opening, and the opening exposes a partial upper surface of the ultrasonic body, wherein the through slot and the opening are at two opposite sides of the ultrasonic body;
• an ultrasonic conducting material located in the opening and being in contact with the upper surface of the ultrasonic body, wherein the ultrasonic conducting material is polydimethylsiloxane;
• and
• a base material, located on the lower surface of the substrate and covering the through slot, such that a space is formed among the through slot, the lower surface of the ultrasonic body and an upper surface of the base material, wherein the space is vacuum.