Sample-and-hold, loop-based schemes with damping control for saturation recovery in amplifiers

An amplifier comprising:

• a loop filter including:
• a first resistor-capacitor (RC) integrator having an input and an output, the input configured to receive an input signal;
• a second RC integrator having an input and an output, the input of the second RC integrator coupled to the output of the first RC integrator;
• a third RC integrator having an input and an output, the input of the third RC integrator coupled to the output of the second RC integrator;
• a last RC integrator having an input and an output, the input of the last RC integrator coupled to an output of a second-to-last RC integrator;
• a damping control mechanism coupled between the input and the output of the second RC integrator;
• and
• reset mechanisms coupled between the input and the output of the third RC integrator to the second-to-last RC integrator, respectively;
• and
• a reset controller configured to output a reset signal to the damping control mechanism and to the reset mechanisms when an overload condition is detected.

A method of recovering from saturation in an nth-order loop filter, the method comprising:

• resetting each of a third resistor-capacitor (RC) integrator to an (n−1)th RC integrator of n series-coupled RC integrators in the nth-order loop filter, wherein n is an integer of 4 or greater;
• maintaining an nth RC integrator of the n series-coupled RC integrators in a hold state;
• and
• performing a controlled reset on a second RC integrator of the n series-coupled RC integrators.

A method of recovering from saturation in an nth-order loop filter, the method comprising:

• closing a switch of a second resistor-capacitor (RC) integrator of n series-coupled RC integrators in the nth-order loop filter to create a resistive circuit path in parallel with an integrating capacitor of the second RC integrator, wherein n is an integer of 4 or greater;
• closing a switch of each of a third RC integrator to an (n−1)th RC integrator of the n series-coupled RC integrators to create a short circuit path in parallel with an integrating capacitor of each of the third to the (n−1)th RC integrator;
• and
• performing a hold operation on an nth RC integrator of the n series-coupled RC integrators.