Stacked capacitor

A method of fabricating an integrated circuit comprising:

• forming a first plate of a first capacitor over a substrate;
• forming a first capacitor dielectric over the first plate of the first capacitor;
• forming a second plate of the first capacitor over the first capacitor dielectric, wherein the second plate of the first capacitor and the first capacitor dielectric have a first width;
• forming a first dielectric over the second plate of the first capacitor;
• forming first and second vias through the first dielectric, the first via extending to contact the first plate of the first capacitor and the second view extending to contact the second plate of the first capacitor;
• forming a first plate of a second capacitor over the first capacitor, the first plate of the second capacitor electrically connected to the second plate of the first capacitor through the second via;
• forming a second capacitor dielectric of the second capacitor over the first plate of the second capacitor;
• and
• forming a second plate of the second capacitor over the second capacitor dielectric, the second capacitor dielectric and the second plate of the second capacitor having a second width less than the first width, wherein the second via is located outside of the second width and within the first width and wherein the second capacitor overlies the first capacitor.

A method of forming an integrated circuit, comprising:

• forming a first capacitor on a substrate, the first capacitor having a first width;
• forming a first dielectric layer on a side of the first capacitor opposite the substrate;
• forming a second capacitor on a side of the first dielectric layer opposite the first capacitor, the second capacitor having a second width, the second width is smaller than the first width, an area of the second capacitor entirely within an area of the first capacitor;
• forming a second dielectric layer on a side of the second capacitor opposite the first dielectric layer;
• forming a first metal layer on a side of the second dielectric layer opposite the second capacitor;
• forming a first electrical connection between the first metal layer and a first plate of the first capacitor, a second electrical connection between the first metal layer and a second plate of the second capacitor, and a third electrical connection between a first plate of the second capacitor and a second plate of the first capacitor, wherein the third electrical connection is located within the first width of the first capacitor and outside of the second width of the second capacitor.