High-frequency high-linear input buffer differential circuit

A high-frequency high-linear input buffer differential circuit, comprising

• two high-frequency high-linear input buffers of a same structure, wherein
• a second high-frequency high-linear input buffer of the two high-frequency high-linear input buffers comprises a first metal oxide semiconductor (MOS) transistor, a second MOS transistor, a third MOS transistor, and a signal panning unit, wherein
• a gate terminal of the first MOS transistor is used as an input terminal of the second high-frequency high-linear input buffer,
• a current input terminal of the first MOS transistor is connected to a current output terminal of the second MOS transistor,
• a current output terminal of the first MOS transistor is connected to a current input terminal of the third MOS transistor, and the current output terminal of the first MOS transistor is used as an output terminal of the second high-frequency high-linear input buffer,
• a current input terminal of the second MOS transistor is connected to a gate terminal of the third MOS transistor,
• an input terminal of the signal panning unit is connected to the input terminal of the second high-frequency high-linear input buffer,
• an output terminal of the signal panning unit is connected to a gate terminal of the second MOS transistor,
• an output terminal of the third MOS transistor is connected to a ground, and
• the current input terminal of the second MOS transistor is connected to an active bias current circuit;
• an input terminal of a first high-frequency high-linear input buffer of the two high-frequency high-linear input buffers is used as a first differential input terminal of the high-frequency high-linear input buffer differential circuit, and an output terminal of the first high-frequency high-linear input buffer is used as a first differential output terminal of the high-frequency high-linear input buffer differential circuit,
• the input terminal of the second high-frequency high-linear input buffer is used as a second differential input terminal of the high-frequency high-linear input buffer differential circuit, and the output terminal of the second high-frequency high-linear input buffer is used as a second differential output terminal of the high-frequency high-linear input buffer differential circuit;
• and
• the first differential input terminal is connected to a reference point through a first capacitor, the second differential input terminal is connected to the reference point through a second capacitor, and the reference point is connected to a bias voltage input terminal through a first resistor;
• or
• the first differential input terminal is connected to a first bias voltage input point through the first capacitor, and the second differential input terminal is connected to a second bias voltage input point through the second capacitor.