Phase shifter with bidirectional amplification

An apparatus comprising:

• a phase shifter comprising:
• a first plus node;
• a first minus node;
• a second plus node;
• a second minus node;
• and
• a bidirectional amplifier comprising:
• a first transistor coupled between the first plus node and the second minus node;
• a second transistor coupled between the first minus node and the second plus node;
• a third transistor coupled between the first plus node and the second minus node;
• a fourth transistor coupled between the first minus node and the second plus node;
• a fifth transistor coupled between the first plus node and the second plus node;
• a sixth transistor coupled between the first minus node and the second minus node;
• a seventh transistor coupled between the first plus node and the second plus node;
• and
• an eighth transistor coupled between the first minus node and the second minus node,
• a gate terminal of the first transistor coupled to the first plus node, and a drain terminal of the first transistor coupled to the second minus node;
• a gate terminal of the second transistor coupled to the first minus node, and a drain terminal of the second transistor coupled to the second plus node;
• a gate terminal of the third transistor coupled to the first plus node, and a drain terminal of the third transistor coupled to the second minus node;
• a gate terminal of the fourth transistor coupled to the first minus node, and a drain terminal of the fourth transistor coupled to the second plus node;
• a gate terminal of the fifth transistor coupled to the first plus node, and a drain terminal of the fifth transistor coupled to the second plus node;
• a gate terminal of the sixth transistor coupled to the first minus node, and a drain terminal of the sixth transistor coupled to the second minus node;
• a gate terminal of the seventh transistor coupled to the first plus node, and a drain terminal of the seventh transistor coupled to the second plus node;
• and
• a gate terminal of the eighth transistor coupled to the first minus node, and a drain terminal of the eighth transistor coupled to the second minus node.

An apparatus comprising:

• a phase shifter comprising:
• a first plus node;
• a first minus node;
• a second plus node;
• a second minus node;
• and
• a bidirectional amplifier comprising:
• a first transistor coupled between the first plus node and the second minus node;
• a second transistor coupled between the first minus node and the second plus node;
• a third transistor coupled between the first plus node and the second minus node;
• a fourth transistor coupled between the first minus node and the second plus node;
• a fifth transistor coupled between the first plus node and the second plus node;
• a sixth transistor coupled between the first minus node and the second minus node;
• a seventh transistor coupled between the first plus node and the second plus node;
• an eighth transistor coupled between the first minus node and the second minus node;
• a first enablement device coupled between:
• the first transistor and at least one power distribution network (PDN) node (PDN node);
• and
• the second transistor and the at least one PDN node;
• a second enablement device coupled between:
• the third transistor and the at least one PDN node;
• and
• the fourth transistor and the at least one PDN node;
• a third enablement device coupled between:
• the fifth transistor and the at least one PDN node;
• and
• the sixth transistor and the at least one PDN node;
• and
• a fourth enablement device coupled between:
• the seventh transistor and the at least one PDN node;
• and
• the eighth transistor and the at least one PDN node.