Maximum likelihood error detection for decision feedback equalizers with pam modulation
AssigneeMarvell Asia Pte Ltd
InventorsJamal Riani, Farshid Rafiee Rad, Benjamin P. Smith, Yu Liao, Sudeep Bhoja
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Abstract
The present invention is directed to data communication. More specifically, an embodiment of the present invention provides an error correction system. Input data signals are processed by a feedforward equalization module and a decision feedback back equalization module. Decisions generated by the decision feedback equalization module are processed by an error detection module, which determines error events associated with the decisions. The error detection module implements a reduced state trellis path. There are other embodiments as well.
Claims16
A data communication system for communicating data over a wired communications network, comprising:
- a receive circuitry configured to receive signals defining data symbols that are transmitted over a communications link;
- a signal processing circuitry configured to improve a quality of the received signals, the signal processing circuitry comprising a feedforward equalizer (FFE) configured to provide an initial noise mitigation, the FFE comprising an amplifier, wherein the amplifier is configured to receive a signal component and a noise component of the received signals and to boost a signal to noise ratio (SNR) of the received signals by boosting an amplitude of the signal component while keeping an amplitude of the noise component within a predetermined threshold;
- a noise error detection logic circuitry configured to detect a noise error event occurring among two or more symbols in the received signals and to mitigate effects of intersymbol interference noise at the noise error event using a first noise mitigation mechanism;
- and
- a noise reduction circuitry, responsive to the noise error detection logic circuitry, the noise reduction circuitry configured to remove a noise mitigation error associated with the noise error detection logic circuitry using a second noise mitigation mechanism, the noise reduction circuitry that is configured to employ a noise reduction mechanism having a mode of operation different from the noise error detection logic circuitry.
A data communication system comprising:
- a signal processing circuitry configured to improve a quality of received signals;
- a noise error detection logic circuitry configured to detect an error event defined by two or more symbols and to remove from the received signals an intersymbol interference noise using a first correction mechanism;
- a noise reduction circuitry, responsive to the noise error detection logic circuitry, the noise reduction circuitry configured to remove error associated with the first correction mechanism using at least a maximum likelihood sequence detection mechanism;
- and
- a reflection cancellation circuitry coupled to the noise error detection logic circuitry and configured to remove reflection noises.
A communication method comprising:
- receiving data signals defining data symbols from a wired communication link;
- processing the received data signals to improve a signal quality of the received data signals, the processing comprising performing equalization to provide an initial noise mitigation and amplifying a signal component and a noise component of the received data signals to boost a signal to noise ratio (SNR) of the received data signals by boosting an amplitude of the signal component while keeping an amplitude of the noise component within a predetermined threshold;
- using a first noise mitigation mechanism to detect one or more noise error events among two or more symbols in the received signals, the one or more noise error events exhibiting intersymbol interference noise;
- and
- removing a noise mitigation error associated with the one or more noise error events using a technique for removing noise mitigation error that is different from a noise mitigation technique of the first noise mitigation mechanism.
Dependencies are inferred from the claim text.