Semiconductor package including semiconductor chips
AssigneeSamsung Electronics Co., Ltd.
InventorsHyungu Kang, Jaekyu Sung
Life of this patent
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Abstract
A semiconductor package may include a semiconductor chip on a package substrate. The semiconductor package may include a plurality of conductive connections connecting the semiconductor chip to the package substrate may be disposed, a plurality of towers which are apart from one another and each include a plurality of memory chips may be disposed, wherein a lowermost memory chip of each of the plurality of towers overlaps the semiconductor chip from a top-down view. The semiconductor package further includes a plurality of adhesive layers be attached between the lowermost memory chip of each of the plurality of towers and the semiconductor chip.
Claims20
A semiconductor package comprising:
- a package substrate;
- a semiconductor chip on the package substrate;
- a plurality of first conductive connections connecting the semiconductor chip to the package substrate;
- a first spacer and a second spacer on the package substrate, each of the first spacer and the second spacer horizontally spaced apart from the semiconductor chip;
- a first tower and a second tower each including a plurality of memory chips, a first memory chip disposed at a lowermost end of the first tower and vertically overlapping the semiconductor chip and the first spacer from a top-down view, and a second memory chip disposed at a lowermost end of the second tower and vertically overlapping the semiconductor chip and the second spacer from a top-down view;
- and
- a plurality of first adhesive layers including an adhesive layer attached between the first memory chip and the semiconductor chip, an adhesive layer attached between the first memory chip and the first spacer, an adhesive layer attached between the second memory chip and the semiconductor chip, and an adhesive layer attached between the second memory chip and the second spacer.
A semiconductor package comprising:
- a package substrate;
- a semiconductor chip on the package substrate;
- a plurality of conductive connections connecting the semiconductor chip to the package substrate;
- a plurality of towers apart from one another, each including a plurality of memory chips, a lowermost memory chip of each of the plurality of towers overlapping the semiconductor chip from a top-down view;
- and
- a plurality of adhesive layers attached between the lowermost memory chip of each of the plurality of towers and the semiconductor chip.
A semiconductor package comprising:
- a package substrate;
- a first semiconductor chip, a second semiconductor chip, and a third semiconductor chip on the package substrate, horizontally spaced apart from each other;
- a plurality of first conductive connections connecting the first to third semiconductor chips to the package substrate;
- a first tower and a second tower each including a plurality of memory chips, a first memory chip disposed at a lowermost end of the first tower overlapping the first semiconductor chip and the second semiconductor chip from a top-down view, and a second memory chip disposed at a lowermost end of the second tower overlapping the first semiconductor chip and the third semiconductor chip from a top-down view;
- and
- a plurality of first adhesive layers attached respectively between the first memory chip and the first semiconductor chip, between the first memory chip and the second semiconductor chip, between the second memory chip and the first semiconductor chip, and between the second memory chip and the third semiconductor chip.
Dependencies are inferred from the claim text.