Processing of data
AssigneeInfineon Technologies AG
InventorsChristian Badack, Jessica Trebst, Michael Goessel, Klaus Oberlaender
Life of this patent
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Abstract
A method and associated apparatus is disclosed for processing data by means of an error code, wherein the error code has an H-matrix with n columns and m rows, wherein the columns of the H-matrix are different, wherein component-by-component XOR sums of adjacent columns of the H-matrix are different from one another and from all columns of the H-matrix and wherein component-by-component XOR sums of nonadjacent columns of the H-matrix are different from all columns of the H-matrix and from all component-by-component XOR sums of adjacent columns of the H-matrix.
Claims18
A method, comprising:
- identifying data to be processed;
- processing the identified data using an error code with a processing circuit to:
- correct 1-bit errors,
- correct adjacent 2-bit errors, and
- detect nonadjacent 2-bit errors,
- outputting the processed identified data when the identified data, upon processing, contains a corrected 1-bit error or a corrected adjacent 2-bit error;
- and
- outputting an error indication indicating that the identified data, upon processing, contains a nonadjacent 2-bit error,
- wherein the error code comprises an H-matrix with n columns and m rows,
- wherein the columns of the H-matrix are different,
- wherein component-by-component XOR sums of adjacent columns of the H-matrix are different from one another and from all columns of the H-matrix, and
- wherein component-by-component XOR sums of nonadjacent columns of the H-matrix are different from all columns of the H-matrix and from all component-by-component XOR sums of adjacent columns of the H-matrix.
An apparatus for processing data using an error code, wherein the error code has an H-matrix with n columns and m rows, wherein the apparatus comprises:
- a memory circuit comprising instructions;
- and
- a processing circuit that is configured to retrieve and execute the instructions, and upon execution of the instructions the processing circuit is configured to:
- determine the error code in accordance with the H-matrix, and
- use the determined error code to process identified data to:
- correct 1-bit errors,
- correct adjacent 2-bit errors, and
- detect nonadjacent 2-bit errors,
- output the processed identified data when the identified data, upon processing, contains a corrected 1-bit error or a corrected adjacent 2-bit error;
- and
- output an error indication indicating that the identified data, upon processing, contains a nonadjacent 2-bit error,
- wherein the columns of the H-matrix are different,
- wherein component-by-component XOR sums of adjacent columns of the H-matrix are different from one another and from all columns of the H-matrix, and
- wherein component-by-component XOR sums of nonadjacent columns of the H-matrix are different from all columns of the H-matrix and from all component-by-component XOR sums of adjacent columns of the H-matrix.
Dependencies are inferred from the claim text.