A voltage-to-current (V2I) converter circuit, comprising:
- a resistor;
- a first constant current source coupled to a first terminal of the resistor and configure to provide a current having a first magnitude to the first terminal of the resistor;
- a second constant current source coupled to a second terminal of the resistor and configure to provide a current having the first magnitude to the second terminal of the resistor;
- a first p-channel Metal-Oxide-Semiconductor Field Effect Transistor (pFET) having a gate coupled to a positive input signal and a first conduction terminal coupled to the first terminal of the resistor;
- a second pFET having a gate coupled to a negative input signal and a first conduction terminal coupled to the second terminal of the resistor;
- a first n-channel Metal-Oxide-Semiconductor Field Effect Transistor (nFET) having a gate coupled to a bias voltage signal, a first conduction terminal coupled to a second conduction terminal of the first pFET, and a second conduction terminal coupled to ground;
- a second nFET having a gate coupled to the bias voltage signal, a first conduction terminal coupled to a second conduction terminal of the second pFET, and a second conduction terminal coupled to ground;
- a third nFET having a gate coupled to the first conduction terminal of the first nFET, a first conduction terminal coupled to the first terminal of the resistor, and a second conduction terminal coupled to ground;
- a fourth nFET having a gate coupled to the first conduction terminal of the second nFET, a first conduction terminal coupled to the second terminal of the resistor, and a second conduction terminal coupled to ground;
- a fifth nFET having a gate coupled to the gate of the third nFET and a second conduction terminal coupled to ground;
- a first current mirror circuit having a reference current input coupled to a first conduction terminal of the fifth nFET and a current output coupled to the second terminal of the resistor;
- a sixth nFET having a gate coupled to the gate of the third nFET and a second conduction terminal coupled to ground;
- a second current mirror circuit having a reference current input coupled to a first conduction terminal of the sixth nFET and a current output coupled to the first terminal of the resistor;
- a seventh nFET having a gate coupled to the gate of the third nFET, a first conduction terminal coupled to a positive output signal, and a second conduction terminal coupled to ground;
- and
- an eighth nFET having a gate coupled to the gate of the fourth nFET, a first conduction terminal coupled to a negative output signal, and a second conduction terminal coupled to ground.