Systems and methods for phase locked loop realignment with skew cancellation
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsTsung-Hsien Tsai, Ruey-Bin Sheen, Chih-Hsien Chang, Cheng-Hsiang Hsieh
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Abstract
Systems and methods are provided for a phase locked loop. A phase/frequency detector is configured to receive a reference signal and a feedback signal. A charge pump is configured to receive outputs from the phase/frequency detector and to generate pulses. An oscillator is configured to generate an output waveform based on the charge pump pulses. A realignment path is configured to generate a clock realignment signal that is provided to the oscillator based on the outputs from the phase/frequency detector.
Claims20
A phase locked loop comprising:
- a phase/frequency detector configured to receive a reference signal and a feedback signal;
- a charge pump configured to receive first and second outputs from the phase/frequency detector and to generate pulses;
- an oscillator configured to generate an output waveform based on the charge pump pulses;
- a filter between the charge pump and the oscillator;
- and
- a realignment path configured to generate a clock realignment signal that is provided to the oscillator based on a third output from the charge pump after the third output from the charge pump bypasses the filter and is routed through a third matching gate.
A method of generating a periodic output waveform, comprising:
- comparing a phase and frequency of a reference signal and a feedback signal using a phase/frequency detector;
- generating pulses based on first and second outputs of the phase/frequency detector using a charge pump;
- generating an output waveform based on the charge pump pulses and a clock realignment signal, the clock realignment signal being based on a third output from the charge pump;
- and
- providing the third output from the charge pump to a third alignment logic gate such that the third output bypasses a filter prior to generating the clock realignment signal.
A clock generation circuit, comprising:
- a charge pump configured to receive a first input signal and a second input signal, the charge pump configured to route the first input signal and the second input signal to respective first and second alignment logic gates, the charge pump configured to generate pulse signals and an output signal based on the first and second input signals;
- a realignment circuit configured to generate a realignment signal based on the output signal from the charge pump after the output signal from the charge pump bypasses a filter and is routed through a third alignment logic gate;
- and
- an oscillator configured to produce an output waveform based on the pulse signals and the realignment signal.
Dependencies are inferred from the claim text.