Active suppression circuitry
AssigneeCadence Design Systems, Inc.
InventorsMoo Sung Chae, Thomas Evan Wilson
Life of this patent
Estimating the term…
Abstract
Various embodiments provide for active suppression circuitry. The active suppression circuitry can be used with a circuit for a memory system, such as a dual data rate (DDR) memory system. For example, some embodiments provide an active suppression integrated circuit. The active suppression integrated circuit can be used by a memory system to efficiently suppress power supply noise caused by resonance of a power delivery network (PDN) of the memory system, thereby improving power integrity of the memory system input/output.
Claims20
A circuit comprising:
- an attenuator coupled to a circuit input;
- a low-pass filter coupled to an output of the attenuator;
- an operational amplifier comprising a first amplifier input coupled to the output of the attenuator, and a second amplifier input coupled to an output of the low-pass filter;
- a driving stage coupled to an output of the operational amplifier;
- and
- a suppression device comprising a first device input coupled to the circuit input, and a second device input coupled to an input of the driving stage.
A non-transitory computer-readable medium comprising instructions that, when executed by one or more processors of a computing device, cause the computing device to generate a circuit design by performing operations comprising:
- configuring, in the circuit design, an attenuator coupled to a circuit input;
- configuring, in the circuit design, a low-pass filter coupled to an output of the attenuator;
- configuring, in the circuit design, an operational amplifier that comprises a first amplifier input coupled to the output of the attenuator, and a second amplifier input coupled to an output of the low-pass filter;
- configuring, in the circuit design, a driving stage coupled to an output of the operational amplifier;
- and
- configuring, in the circuit design, a suppression device that comprises a first device input coupled to the circuit input, and a second device input coupled to an output of the driving stage.
Dependencies are inferred from the claim text.