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US 11,540,395 B2Granted
Stacked-component placement in multiple-damascene printed wiring boards for semiconductor package substrates
AssigneeIntel Corporation
InventorsBok Eng Cheah, Jackson Chung Peng Kong, Chin Lee Kuan
Life of this patent
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Abstract
A multiple-damascene structure is located below a semiconductor device footprint on a printed wiring board, where the structure includes multiple recesses that containing useful devices coupled to a semiconductive device.
Claims17
A printed wiring board including a land side and a shell side, comprising:
- at least one electrical connection on the land side;
- a primary recess that extends toward the land side and to a first depth in the shell side, wherein the primary recess includes a first-recess footprint that projects to the land side to encompass the at least one connection;
- a subsequent recess that extends toward the land side and to a subsequent depth in the shell side, wherein the subsequent recess is encompassed by the first-recess footprint;
- a semiconductive device above the land side, wherein the primary recess overlaps at least a part of the semiconductive device;
- a passive device in the subsequent recess, wherein the passive device is coupled to power and to ground within the subsequent recess;
- and
- a first device, separate from the passive device, in the primary recess, wherein the first device is coupled to power and to ground within the primary recess, wherein the first device extends over at least a portion of the passive device.
4 more elements
A semiconductor device package, comprising:
- a semiconductive device on a die side of a semiconductor device package substrate;
- a printed wiring board including a land side and a shell side, wherein the semiconductor device package substrate is coupled on the land side;
- a primary recess that extends toward the land side and to a first depth in the shell side, wherein the primary recess includes a first-recess footprint that projects to the land side to overlap at least a portion of the semiconductor device package substrate;
- a first device in the first recess, wherein the first device is coupled to the semiconductive device;
- a subsequent recess that extends toward the land side and to a subsequent depth in the shell side, wherein the subsequent recess is encompassed by the first-recess footprint;
- a capacitor in the subsequent recess, wherein the capacitor is coupled to the semiconductive device;
- a third recess that extends toward the land side and to a third depth in the shell side, wherein the third recess is encompassed by the first-recess footprint;
- and
- a capacitor in the third recess, wherein the capacitor is coupled to the semiconductive device.
6 more elements
Dependencies are inferred from the claim text.