Lockless stateful network address translation
AssigneeIntel Corporation
InventorsVladimir Medvedkin, Andrey Chilikin
Life of this patent
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AssigneeIntel Corporation
InventorsVladimir Medvedkin, Andrey Chilikin
Estimating the term…
Examples include a computing system having a plurality of processing cores and a memory coupled to the plurality of processing cores. The memory has instructions stored thereon that, in response to execution by a selected one of the plurality of processing cores, cause the following actions. The selected processing core to receive a packet and get an original tuple from the packet. When no state information for a packet flow of the packet exists in a state table, select a new network address as a new source address for the packet, get a reverse tuple for a reverse direction, select a port for the packet from an entry in a mapping table based on a hash procedure using the reverse tuple, and save the new network address and selected port. Translate the packet's network address and port and transmit the packet.
A computing system comprising:
A method to be performed by a processor, comprising:
At least one non-transitory tangible machine-readable medium comprising a plurality of instructions that in response to being executed by a processor cause the processor to:
Dependencies are inferred from the claim text.