Bidirectional blocking monolithic heterogeneous integrated cascode-structure field effect transistor, and manufacturing method thereof

A method for manufacturing a bidirectional blocking monolithic heterogeneous integrated Cascode-structure field effect transistor, the method comprising:

• employing metal organic chemical vapor deposition and atomic layer deposition processes to epitaxially grow a GaN buffer layer on a substrate;
• to epitaxially grow a AlGaN barrier layer on the GaN buffer layer;
• to deposit a SiN isolation layer on the AlGaN barrier layer, so as to obtain a SiN/AlGaN/GaN/substrate chip;
• employing photolithography and reactive ion etching processes to form a monocrystalline silicon thin-film island on a SOI wafer;
• employing a wet etching process to etch away a buried oxide layer not covered by the monocrystalline silicon thin-film island from the monocrystalline silicon thin-film island on the SOI wafer in a 49% HF solution;
• employing a photolithography process to make anchor points at an edge of the monocrystalline silicon thin-film, so as to prevent the monocrystalline silicon thin-film from shifting and falling off after subsequently the buried oxide layer is etched away completely;
• employing a wet etching process to completely etch away the buried oxide layer from the sample provided with the anchor points in a 49% HF solution, so that the monocrystalline silicon thin-film falls onto the base of the SOI wafer;
• employing a transfer printing technology to transfer the monocrystalline silicon thin-film, that fell onto the base of the SOI wafer, onto the SiN/AlGaN/GaN/substrate chip;
• employing photolithography and reactive ion etching processes to etch an isolation groove with a depth of 300-350 nm on the SiN/AlGaN/GaN/substrate chip having the monocrystalline silicon thin-film on the SOI wafer and form a Si/SiN/AlGaN/GaN island and a SiN/AlGaN/GaN island on both sides of the isolation groove respectively;
• employing an ion implantation process to implant phosphorus ions at a dose of 5×1015 cm2 and an energy of 30 keV onto the monocrystalline silicon thin-film of the Si/SiN/AlGaN/GaN island, and annealing under a nitrogen atmosphere at 1,000° C. for 60 s to activate impurities and form N-type heavily doped source and drain regions;
• employing reactive ion etching and electron beam evaporation processes to etch away SiN on the source region on the SiN/AlGaN/GaN island, then depositing titanium metal with a thickness of 22 nm, aluminum metal with a thickness of 140 nm, nickel metal with a thickness of 55 nm and gold metal with a thickness of 45 nm sequentially on the source region to form a source electrode of a GaN high-electron-mobility transistor, and annealing under a nitrogen atmosphere with a temperature of 875° C. for 30 s, so that ohmic contact is formed between the source electrode and the AlGaN;
• employing reactive ion etching and electron beam evaporation processes to etch away SiN on the gate and drain regions on the SiN/AlGaN/GaN island, and then sequentially depositing nickel metal with a thickness of 45-70 nm and gold metal with a thickness of 100-200 nm on the gate and drain regions after the SiN is etched away, so as to form a gate electrode and a drain electrode of the GaN high-electron-mobility transistor respectively;
• employing an atomic layer deposition process to deposit aluminum sesquioxide with a thickness of 20-30 nm on the whole sample under conditions of a temperature of 300° C. and a nitrogen atmosphere, so as to form a gate dielectric layer of the Si metal oxide semiconductor field effect transistor;
• and then employing a magnetron sputtering process to spray tantalum nitride with a thickness of 100-200 nm on the aluminum sesquioxide thin-film above the undoped monocrystalline silicon thin-film, so as to form a gate electrode of the Si metal oxide semiconductor field effect transistor;
• employing wet etching and electron beam evaporation processes to etch away aluminum sesquioxide on the source and drain regions of the monocrystalline silicon thin-film, depositing nickel metal with a thickness of 30-100 nm on the source and drain regions to form a source electrode and a drain electrode of the Si metal oxide semiconductor field effect transistor, and annealing under a nitrogen atmosphere with a temperature of 400° C. for 1 min, so that the source and drain electrodes form ohmic contact with the heavily doped source and drain regions;
• employing a wet etching process to etch away aluminum sesquioxide covering the gate, source and drain electrodes of the GaN high-electron-mobility transistor with a HF solution with a concentration of 5%, so that the gate, source and drain electrodes of the GaN high-electron-mobility transistor are exposed to the outside;
• and
• employing an electron beam evaporation process to deposit aluminum metal with a thickness of 200-300 nm on the aluminum sesquioxide dielectric layer, and forming metal interconnections between the drain electrode of the Si metal oxide semiconductor field effect transistor and the source electrode of the GaN high-electron-mobility transistor and between the source electrode of the Si metal oxide semiconductor field effect transistor and the gate electrode of the GaN high-electron-mobility transistor, thereby completing the manufacture of the bidirectional blocking monolithic heterogeneous integrated Cascode-structure field effect transistor.