Method for etching back hard mask layer on tops of dummy polysilicon gates in gate last process

A method for semiconductor process for making a semiconductor device, comprising steps:

• step 1:
• forming a plurality of dummy gate structures, wherein each of the plurality of dummy gate structures is built by superposing a gate dielectric layer, dummy polysilicon gates and a hard mask layer in a stack on a semiconductor substrate, wherein each of the plurality of dummy gate structures has two side surfaces, wherein there are space regions formed between two adjacent sidewalls of the plurality of dummy gate structures;
• and forming sidewalls on the side surfaces of the plurality of dummy gate structures, wherein a top surface of each of the sidewalls of the plurality of dummy gate structures is higher than a top surface of each of the dummy polysilicon gates and lower than or equal to a top surface of the hard mask layer;
• wherein a first type of the plurality of dummy gate structures comprises a first pattern density and a second type of the plurality of dummy gate structures comprises a second pattern density, wherein each of the space regions of the first type of the plurality of dummy gate structures has a first width and each of the space regions of the second type of the plurality of dummy gate structures has a second width, and wherein the first width is smaller than the second width, so the first pattern density is higher than the second pattern density;
• step 2:
• depositing a spin-on carbon layer on the plurality of dummy gate structures, wherein the spin-on carbon layer fills the space regions between the sidewalls of the plurality of dummy gate structures to a level above the top surface of each of the plurality of dummy gate structures;
• step 3:
• performing a first etching-back to the spin-on carbon layer to remove the spin-on carbon layer outside the space regions and to keep the spin-on carbon layer in the space regions below the top surfaces of each of the dummy polysilicon gate, such that no residue is formed on the sidewalls of the space regions;
• wherein the spin-on carbon layer does not have an etch loading difference to different pattern densities for the first etching-back;
• step 4:
• performing a second etching-back by using the remaining spin-on carbon layer as a mask to remove the hard mask layer and the sidewalls of the dummy polysilicon gates on both sides of the hard mask layer at a same time,
• wherein the hard mask layer comprises a first nitride layer and a second oxide layer in a stack, and wherein the second oxide layer is removed and the first nitride layer is reserved in the second etching-back;
• and
• step 5:
• removing the remaining spin-on carbon layer.