Shielded trench devices
AssigneeIpower Semiconductor
InventorHamza Yilmaz
Life of this patent
Estimating the term…
Abstract
A shield trench power device such as a trench MOSFET or IGBT employs a gate structure with an underlying polysilicon shield region overlying a shield region in an epitaxial or crystalline layer of the device. The polysilicon region may be laterally confined by spacers in a gate trench and may contact or be isolated from the underlying shield region. Alternatively, the polysilicon region may be replaced with an insulating region.
Claims25
A trench semiconductor device, comprising:
- a substrate making ohmic contact to a bottom electrode;
- a semiconductor layer of a first conductivity type, the semiconductor layer forming a junction with the substrate;
- a plurality of shield regions of a second conductivity type in the semiconductor layer;
- a plurality of shield polysilicon regions of the second conductivity type and confined laterally by dielectric spacers, the shield polysilicon regions respectively being on the shield regions;
- a plurality of gate trench structures respectively on the shield polysilicon regions in an active device area of the semiconductor layer, each of the gate trench structures including:
- a conductive gate;
- and
- a dielectric layer between the conductive gate and an associated one of the shield polysilicon regions;
- a plurality of body regions of the second conductivity type adjacent to the gate trench structures;
- a plurality of regions of the first conductivity type in the body regions;
- a top electrode ohmically contacting the body regions and the regions of the first conductivity type in the body regions;
- and
- an edge termination structure encircling the active device area.
A trench semiconductor device, comprising:
- a substrate making ohmic contact to a bottom electrode;
- a semiconductor layer of a first conductivity type, the semiconductor layer forming a junction with the substrate;
- a plurality of shield regions of a second conductivity type in the semiconductor layer;
- a plurality of shield polysilicon regions of the second conductivity type and confined laterally by dielectric spacers, the shield polysilicon regions respectively being on the shield regions;
- and
- a plurality of gate trench structures respectively on the shield polysilicon regions, each of the gate trench structures including:
- a dielectric layer on an underlying one of the shield polysilicon regions;
- and
- a conductive gate on the dielectric layer, wherein the gate trench structures have a strip or polygon geometry.
A trench semiconductor device, comprising:
- a substrate making ohmic contact to a bottom electrode;
- a semiconductor layer of a first conductivity type, the semiconductor layer forming a junction with the substrate;
- a plurality of shield regions of a second conductivity type in the semiconductor layer;
- a plurality of first polysilicon regions fully isolated by dielectric layers, the first polysilicon regions respectively being on the shield regions;
- and
- a plurality of gate trench structures respectively on the first polysilicon regions, each of the gate trench structures including:
- a dielectric layer on an underlying one of the first polysilicon regions;
- and
- a conductive gate on the dielectric layer.
A method of forming a vertical trench power device, the method comprising:
- forming a plurality of gate trenches in a semiconductor layer of a first conductivity type, the semiconductor layer overlying a substrate;
- forming first dielectric spacers on sidewalls and bottoms of the gate trenches;
- forming shield regions of a second conductivity type in the semiconductor layer below the gate trenches;
- forming polysilicon shield regions in the gate trenches overlying the shield regions, the polysilicon shield regions being confined laterally by the first dielectric spacers on the sidewalls of the gate trenches and separated from the shield regions by the first dielectric spacers on the bottoms of the gate trenches;
- forming second dielectric spacers overlying the polysilicon shield regions;
- and
- forming conductive gate structures in the gate trenches, the conductive gate structures overlying the second dielectric spacers and the polysilicon shield regions, wherein
- forming the polysilicon shield regions comprises:
- depositing a polysilicon layer into the gate trenches containing the first dielectric spacers;
- doping the polysilicon layer with dopants of the first conductivity type;
- and
- etching down the polysilicon layer to leave the polysilicon shield regions on the first dielectric spacers at the bottoms of the gate trenches.
Dependencies are inferred from the claim text.