Cell deep trench isolation pyramid structures for CMOS image sensors

An imaging system, comprising:

• a pixel array including an array of pixel cells formed in a semiconductor layer, wherein each of the pixel cells comprises:
• a photodiode disposed in a pixel cell region of a semiconductor layer and proximate to a front side of the semiconductor layer to generate image charge in response to incident light directed through a backside of the semiconductor layer to the photodiode;
• and
• a cell deep trench isolation (CDTI) structure disposed in the pixel cell region of the semiconductor layer along an optical path of the incident light to the photodiode and proximate to the backside of the semiconductor layer, wherein the CDTI structure comprises:
• a plurality of portions arranged in the semiconductor layer,
• wherein each of the plurality of portions extends a respective depth from the backside towards the front side of the semiconductor layer,
• wherein the respective depth of each of the plurality of portions is different than a respective depth of a neighboring one of the plurality of portions, and
• wherein said each of the plurality of portions is laterally separated and spaced apart from said neighboring one of the plurality of portions in the semiconductor layer;
• control circuitry coupled to the pixel array to control operation of the pixel array;
• and
• readout circuitry coupled to the pixel array to readout image data from the pixel array.

A method for providing a pixel cell, comprising:

• providing a semiconductor layer including a photodiode disposed in a pixel cell region of the semiconductor layer and proximate to a front side of the semiconductor layer to generate image charge in response to incident light directed through a backside of the semiconductor layer to the photodiode;
• depositing a patterned mask layer over the backside of the semiconductor layer, wherein the patterned mask layer includes a pattern having a plurality of openings having different widths, wherein each of the plurality of openings is laterally separated and spaced apart from a neighboring one of the plurality of openings in the pattern, wherein a respective width of each of the plurality of openings is different than a respective width of a neighboring one of the plurality of openings;
• etching the backside of the semiconductor layer through the plurality of openings in the patterned mask layer to form a plurality of trenches in the semiconductor layer, wherein each one of the plurality of trenches has a respective depth that extends from the backside towards the front side of the semiconductor layer, wherein the respective depth of each of the plurality of trenches is different than a respective depth of a neighboring one of the plurality of trenches due to an etch loading effect;
• removing the patterned mask layer;
• and
• depositing a dielectric material into the plurality of trenches to form a cell deep trench isolation (CDTI) comprised of a plurality of portions in the pixel cell region of semiconductor layer along an optical path of the incident light to the photodiode and proximate to the backside of the semiconductor layer, wherein each of the plurality of portions of the CDTI structure comprises a respective one of the plurality of trenches filled with the dielectric material.