Semiconductor memory device
AssigneeSK hynix Inc.
InventorSung Lae Oh
Life of this patent
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Abstract
A semiconductor memory device includes an electrode structure including a plurality of electrode layers and a plurality of interlayer dielectric layers which are alternately stacked on a source plate defined with a cell area and a connection area in a first direction; a vertical channel passing through the electrode structure in the cell area; a hard mask pattern disposed on the electrode structure in the connection area, and having a plurality of opening holes; a plurality of contact holes defined in the electrode structure under the opening holes, and exposing pad areas of the electrode layers; and a slit dividing the hard mask pattern into units smaller than the electrode structure in the connection area.
Claims13
A semiconductor memory device comprising:
- a logic structure disposed on a substrate which is defined with a cell area and a connection area in a first direction;
- an electrode structure including a plurality of electrode layers and a plurality of interlayer dielectric layers which are alternately stacked on a source plate disposed on the logic structure;
- a vertical channel passing through the electrode structure in the cell area;
- a hard mask pattern disposed on the electrode structure in the connection area, and having a plurality of opening holes;
- a plurality of contact holes defined in the electrode structure under the opening holes, and exposing pad areas of the electrode layers;
- and
- a discharge path coupling the hard mask pattern and the substrate.
Dependencies are inferred from the claim text.