Integrated circuitry, a method used in forming integrated circuitry, and a method used in forming a memory array comprising strings of memory cells
AssigneeMicron Technology, Inc.
InventorPurnima Narayanan
Life of this patent
Estimating the term…
Abstract
A method used in forming integrated circuitry comprises forming a stack comprising vertically-alternating first tiers and second tiers. The first tiers comprise doped silicon dioxide and the second tiers comprise undoped silicon dioxide. Horizontally-elongated trenches are formed into the stack. Through the trenches, the doped silicon dioxide that is in the first tiers is etched selectively relative to the undoped silicon dioxide that is in the second tiers. Conducting material is formed in the void space in the first tiers that is left by the etching. Structure independent of method is disclosed.
Claims14
A method used in forming integrated circuitry, comprising:
- forming a stack comprising vertically-alternating first tiers and second tiers, the first tiers comprising doped silicon dioxide, the second tiers comprising undoped silicon dioxide;
- forming horizontally-elongated trenches into the stack;
- through the trenches, etching the doped silicon dioxide that is in the first tiers selectively relative to the undoped silicon dioxide that is in the second tiers;
- forming conducting material in void space in the first tiers that is left by the etching;
- and
- the stack comprising a first region and a second region aside the first region, the etching and the forming conducting material in the void space occurring in the first region and not in the second region such that the doped silicon dioxide in the first tiers and the undoped silicon dioxide in the second tiers remain in the second region in a finished construction of the integrated circuitry.
A method used in forming a memory array comprising strings of memory cells, comprising:
- forming a stack comprising vertically-alternating first tiers and second tiers, the first tiers comprising doped silicon dioxide, the second tiers comprising undoped silicon dioxide, the stack comprising laterally-spaced memory-block regions having horizontally-elongated trenches there-between, channel-material strings extending through the first tiers and the second tiers in the memory-block regions;
- through the trenches, etching the doped silicon dioxide that is in the first tiers selectively relative to the undoped silicon dioxide that is in the second tiers;
- forming conducting material of conductive lines in void space in the first tiers that is left by the etching;
- and
- forming intervening material in the trenches laterally-between and longitudinally-along immediately-laterally-adjacent of the memory-block regions.
Dependencies are inferred from the claim text.